Display Substrate Pixel Layout for Gate-Line Capacitance Control
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Solution Overview
Problem
Current semiconductor substrates and display devices face challenges in efficiently driving elements with multiple current paths, particularly in reducing parasitic capacitance and optimizing transistor configurations for improved performance.
Innovation Solution
The semiconductor substrate and display device design incorporates a first base material with intersecting gate and source lines, featuring thin-film transistors connected to pixel electrodes, where the gate lines do not overlap the first pixel electrode but overlap the second, reducing parasitic capacitance and enhancing current path management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If gate lines overlap both pixel electrodes to simplify wiring, then device complexity is reduced, but parasitic capacitance increases
Solution Approach 1:
The gate lines are segmented into different sections: a first gate line section that overlaps only the second pixel electrode, and a second gate line section that overlaps both pixel electrodes. This segmentation allows the wiring to be simplified in certain areas while controlling parasitic capacitance in critical regions.
Solution Approach 2:
Different portions of the gate lines have different overlapping characteristics with pixel electrodes. The first gate line section has selective overlap (only with second pixel electrode) to minimize parasitic capacitance, while the second gate line section has broader overlap for wiring simplicity. This local differentiation resolves the contradiction between wiring complexity and parasitic capacitance.
2Productivity
If multiple transistors are connected to a single pixel electrode to increase driving capability, then current path management improves, but transistor configuration complexity increases
Solution Approach 1:
Multiple transistors (first and second transistors) are connected to share a common pixel electrode (first pixel electrode). This merging approach increases the driving capability by providing multiple current paths to the same pixel electrode, while the shared connection simplifies the overall configuration compared to having completely separate pathways.
Solution Approach 2:
The first pixel electrode serves multiple functions by being connected to both the first and second transistors. It acts as a common output for multiple current paths, enabling the pixel electrode to handle increased current while maintaining a relatively simple connection architecture.
Data Source
AI summary
According to one embodiment, a semiconductor substrate comprises a pixel partitioned by a first gate line and a second gate line among a plurality of gate lines and by a first source line and a second source line among a plurality of source lines, a first transistor and a second transistor that are arranged in the pixel, and a first pixel electrode disposed between the first source line and the second source line and a second pixel electrode adjacent to the first pixel electrode in the second direction, wherein the first transistor and the second transistor are connected to the first pixel electrode, and the first gate line does not overlap the first pixel electrode but overlaps the second pixel electrode.