Display Substrate LED Chip Layout for Larger Tiling Distance

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Solution Overview

Problem

The existing Mini LED/Micro LED display devices face challenges in efficiently tiling large-scale displays due to limitations in substrate design and manufacturing processes, which affect the tiling distance and overall display performance.

Innovation Solution

A display substrate design featuring specific arrangements of light emitting diode chips, including first, second, and third chips with varying light emitting regions and distributions across multiple pixel units, ensuring a larger tiling distance by positioning chips away from the substrate edges, allowing for efficient tiling of display panels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If LED chips are positioned close to substrate edges to maximize display area, then display area is improved, but tiling distance becomes insufficient

Engineering Contradiction:
Improvedisplay areaVSAvoidtiling distance
Core Design Contradiction:
Area of stationary objectVSLength of moving object

Solution Approach 1:

The patent segments the substrate into distinct functional zones: a display area containing pixel units and LED chips, and a non-display area (edge region) providing sufficient tiling distance. This segmentation allows the display area to be maximized while ensuring the edge region maintains adequate spacing for tiling operations, resolving the contradiction between display area and tiling distance.

Inventive Principle:
Principle #1Segmentation

2Length of moving object

If LED chips are positioned away from substrate edges to ensure sufficient tiling distance, then tiling distance is improved, but display area is reduced

Engineering Contradiction:
Improvetiling distanceVSAvoiddisplay area
Core Design Contradiction:
Length of moving objectVSArea of stationary object

Solution Approach 1:

The patent optimizes the two-dimensional layout by strategically positioning LED chips within pixel units that are themselves located within the display area, maintaining adequate distance from substrate edges. This dimensional optimization ensures sufficient tiling distance while maximizing the utilization of display area through efficient spatial arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If multiple LED chips share a single pixel unit, then device complexity is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvechip arrangement complexityVSAvoidchip positioning precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent merges multiple LED chips (first, second, and third LED chips) within a single pixel unit, reducing the overall number of pixel units required and simplifying the device structure. This merging approach decreases device complexity while the standardized chip arrangements and defined positioning relationships help manage manufacturing precision requirements.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed substrate design facilitates efficient tiling of display panels by maintaining sufficient spacing at the substrate edges, enhancing display performance and enabling large-scale display applications.

Implementation Method 1

a first light emitting diode chip and a second light emitting diode chip... the first light emitting diode chip comprises three light emitting regions, which are configured to emit red light, green light and blue light, respectively

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentEP4207302B1Display substrate, tiled display panel, and display device
Publication Date: 2025.09.17 BOE TECHNOLOGY GROUP CO LTD
  • EP4207302B1 patent drawingFigure 1
  • EP4207302B1 patent drawingFigure 2
  • EP4207302B1 patent drawingFigure 3~4

AI summary

A display substrate, including: a base substrate including at least a side edge and a display area; a plurality of pixel units disposed in the display area including a first pixel unit, a second pixel unit and a third pixel unit, wherein the plurality of second pixel units are located on a side of the plurality of first pixel units close to the side edge, edges of the plurality of second pixel units include the side edge, the third pixel unit is located between the first pixel unit and the second pixel unit, and the third pixel unit is adjacent to the second pixel unit; and a plurality of light emitting diode chips disposed on the base substrate including a first light emitting diode chip and a second light emitting diode chip, wherein the first light emitting diode chip is located in the first pixel unit, a part of the second light emitting diode chip is located in the second pixel unit, and the other part of the second light emitting diode chip is located in the third pixel unit.