Display Substrate Capacitive Layout for Uniform Gate Line Delay
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Solution Overview
Problem
In special-shaped screens, the varying number of sub-pixels connected to gate lines leads to different signal loads, resulting in unequal signal delays that adversely affect the display effect of display devices.
Innovation Solution
A display substrate with a frame region and a display region, where the signal line in the frame region forms a capacitor with the gate line in the display region to increase the load capacitance, ensuring equal signal delays across all gate lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the display screen uses a special shape to match device shapes, then the adaptability of the display device is improved, but the signal delay uniformity across gate lines deteriorates
Solution Approach 1:
The patent applies local quality by differentiating the capacitor configuration across different regions of the display substrate. Specifically, gate lines in the first region (with fewer sub-pixels) are equipped with capacitors formed by overlapping signal lines, while gate lines in the second region (with more sub-pixels) do not have such capacitors. This localized differentiation compensates for the varying load capacitances caused by the special-shaped display layout, thereby maintaining uniform signal delay characteristics across all gate lines while preserving the adaptive display shape.
2Shape
If the number of sub-pixels connected to gate lines varies in different regions, then the special-shaped display layout is achieved, but the load capacitance uniformity of gate lines deteriorates
Solution Approach 1:
The patent employs parameter changes by modifying the electrical parameters of gate lines in different regions through the introduction of capacitors. The overlapping area between signal lines and gate lines in the first region is specifically designed to provide additional capacitance, changing the electrical parameter (load capacitance) of those gate lines to match the load capacitance of gate lines in the second region. This parameter adjustment ensures uniform load capacitance across all gate lines despite the varying number of connected sub-pixels in the special-shaped layout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures that the load capacitance of gate lines with fewer sub-pixels is compensated, resulting in uniform signal delays and improved display effects across the display device.
Implementation Method 1
a capacitor is formed between the signal line and the gate line in the first region to increase a load capacitance of the gate line in the first region
Data Source
AI summary
The present disclosure provides a display substrate and a display device. The display substrate includes a display region and a frame region surrounding the display region. The display region includes a first region and a second region, and the quantity of sub-pixels connected to each gate line in the first region is less than the quantity of sub-pixels connected to each gate line in the second region. The display substrate includes a signal line arranged in the frame region, an orthogonal projection of each gate line in the first region onto a base substrate of the display substrate partially overlaps an orthogonal projection of the signal line onto the base substrate, and a capacitor is formed between the signal line and the gate line in the first region to increase a load capacitance of the gate line in the first region.