Display Substrate Signal Line Layout With Lapped Conductive Layers

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Solution Overview

Problem

Existing display technologies face challenges in optimizing the structure and connectivity of transistors and capacitors within display substrates, particularly in OLED and QLED devices, which affect the efficiency and reliability of signal transmission and light emission.

Innovation Solution

The display substrate incorporates a novel design with interconnected transistors and capacitors, including a storage capacitor with overlapping electrode plates and lapped signal lines, and shared power and compensation vias, enhancing connectivity and reducing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional separate-layer design is used for signal lines and capacitor electrodes, then manufacturing process is simpler, but signal transmission efficiency and connectivity are reduced

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidconductive layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the signal line layer and capacitor electrode layer into a unified conductive layer structure. The scan signal line and auxiliary signal line are integrated in the same conductive layer, allowing direct electrical connection and improved signal transmission efficiency while reducing the number of separate layers needed

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a traditional multi-layer stacked design to a planar integrated design where signal lines and capacitor electrodes coexist in the same conductive layer. This dimensional reorganization allows for direct lateral connections rather than requiring vertical interlayer connections, improving connectivity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If more conductive layers are added to improve connectivity, then signal transmission efficiency improves, but manufacturing complexity increases

Engineering Contradiction:
ImproveconnectivityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple functional elements (scan signal lines, auxiliary signal lines, and capacitor electrodes) into a single conductive layer. This merging reduces the total number of conductive layers from traditional multi-layer structures to a simplified single-layer design, easing manufacturing while maintaining connectivity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The conductive layer is designed to serve multiple functions simultaneously: it acts as both signal transmission pathways (scan signal lines and auxiliary signal lines) and capacitor electrodes. This multi-functionality eliminates the need for separate dedicated layers for each function, simplifying the manufacturing process

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If lapped signal line design is used, then signal transmission efficiency improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidsignal line alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The scan signal line and auxiliary signal line are merged into the same conductive layer and designed to overlap (lap) with each other. This integration ensures precise alignment since both lines are formed in the same layer during a single patterning process, eliminating alignment errors between separate layers while achieving improved signal transmission through the lapped configuration

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4719012A1Display substrate and manufacturing method therefor, and display device
Publication Date: 2026.04.01 BOE TECHNOLOGY GROUP CO LTD
  • EP4719012A1 patent drawingFigure 1~2
  • EP4719012A1 patent drawingFigure 3
  • EP4719012A1 patent drawingFigure 4

AI summary

A display substrate and a manufacturing method therefor, and a display device. The display substrate comprises a plurality of repeating units (100); each repeating unit (100) comprises a plurality of sub-pixels; each sub-pixel at least comprises a pixel driving circuit, a scanning signal line (30), and an auxiliary signal line (30A); each pixel driving circuit comprises a first electrode sheet (61) and at least one transistor; and the at least one transistor is connected to the first electrode sheet (61) by means of a connecting electrode. In a direction perpendicular to the display substrate, the display substrate comprises a first conductive layer and a second conductive layer, the auxiliary signal lines (30A) and the first electrode sheets (61) are arranged in the first conductive layer, the scanning signal lines (30) and the connecting electrodes are arranged in the second conductive layer, the orthographic projections of the scanning signal lines (30) on a base plane are located within the range of the orthographic projections of the auxiliary signal lines (30A) on the base plane, and the scanning signal lines (30) are in lap joint with the auxiliary signal lines (30A).