Static Indicating Devices TRIZ Cases

A polarized one-way mirror reflects ambient light while transmitting virtual content, improving AR privacy and reducing viewer reflections.

Independent scan lines routed through the winding area balance wiring load around hole regions and improve display uniformity.

Multi-layer power-line routing reduces data-line overlap, helping OLED display substrates achieve higher resolution without losing driving frequency.

Different gamma curves by pixel density balance OLED brightness across mixed-density areas, reducing visible luminance mismatch.

Lapped scan and auxiliary signal lines in a shared conductive layout improve display substrate connectivity while reducing layer complexity.

Segmented pixel lines preserve a light-transmitting display area, allowing under-panel cameras or sensors to operate without losing display function.

Patterned black matrix openings guide texture-reflected light to image sensors while blocking stray light for faster, more accurate touch-surface recognition.

A dual-voltage SRAM pixel with a two-transistor level shifter enables 1-6 μm LCoS pitches while limiting leakage and circuit complexity.

Directly resetting both storage-capacitor nodes before data sampling cuts leakage-driven flicker and luminance unevenness in micro-LED displays.

Region-specific touch driving signals adjust frequency and pulse count to improve small-block sensitivity, cut noise, and keep touch response uniform.

Clock-controlled reset isolation stabilizes display driving nodes and prevents leakage from incomplete transistor cutoff.

Bridge and bypass power lines feed adjacent sub-pixels with different voltages in one planar layer, reducing mask steps and fabrication complexity.

Backlight temperature sensors enable indirect panel compensation to stabilize color coordinates and brightness without adding panel-side complexity.

Segmented transmission and display regions let sensors or cameras sit under the panel while preserving image display in the component area.

Shared scan and data line routing keeps transition sub-pixels synchronized, preserving pixel density and display continuity around light-transmitting areas.

A hybrid LTPS-IGZO gate line driver boosts long-line driving current, cuts leakage, and preserves signal stability on large display panels.

Positive-polarity voltage compensation balances sub-pixel charging time, improving display uniformity and reducing crosstalk.

Variable differential signal amplitudes cut sensing power while preserving stable pixel compensation and reducing brightness deviation.

Selective blank-period pixel refresh cuts OLED data-line power use by avoiding repeated flashing while preserving brightness with low-leakage transistors.

An added NMOS blocks control-node leakage during self-scan, keeping gate signals stably low at low display driving frequencies.

MEMS actuators steer pixel angles so one display can send private content to different viewers without parallax barriers that cut brightness.

Folded pixel borders and doubled light transmission regions reduce diffraction ghosting while preserving high-PPI display transparency.

Multiple controlled current paths shorten scan-signal edges, giving pixels more data-writing time and improving display quality.

Dual light conversion layers redirect and polarize emitted light to improve brightness and image quality in VR and AR displays.

Current-type phase-inverted pseudo signals offset display electric fields despite load differences, cutting EMI and bezel area.

A dual-gate oxide TFT stabilizes gate-driver internal nodes in in-cell touch panels, preventing threshold shifts and lowering power use.

A transition backlight and dynamic PWM pulse adjustment smooth DC-to-PWM dimming, reducing flicker and refresh-rate instability.

An integrated sensor driving circuit uses oxide reset, amplification, and output transistors to improve biometric sensing in display panels.

Alternating first and second pixel units within each cycle lets an electrophoretic display show consecutive frames faster and reduce visible latency.

Generative AI splits a coordinated background image across linked devices, improving personalization without fully separate image generation.

Mirror current control and subfield scanning let RGB sub-pixels reach 256 grayscale levels at conventional clock frequencies.

Overlapping wiring and stacked transistor layers shrink signal-line area in high-pixel-density display panels while preserving image quality.

Alternating PWM across pixel row subgroups gives switching transistors recovery time, reducing threshold drift and stabilizing display output.

Staggered refresh across polarization modulator and backlight sub-areas improves projection display resolution while reducing crosstalk.

Cartridge-level parameter mapping and compensation align adjacent micro devices to reduce color point and performance non-uniformity.

Opposite-polarity gate and data driving raises AM ChLCD refresh speed for handwriting display while preventing liquid crystal polarization.

Capacitor coupling filters AC and DC voltage noise at alignment wires, stabilizing the electric field for uniform light-emitting element alignment.

Edge-side electrostatic protection circuits on display panel signal lines discharge static electricity and protect shift register circuitry.

Grouped scan signal lines and shift register circuits disperse dense wiring, easing back-routing and improving display uniformity.

External retarders tune phase retardation in reflective LCD SLMs to replace bulky PBS optics and preserve contrast, brightness, and fast switching.

Strategic grooves in inorganic and insulating layers relieve bend stress while preserving TFT pixel performance in flexible display panels.

Modified UDC pixel TFT layouts raise camera transmittance while reducing luminance and lifespan gaps that make the camera area visible.

Overlapping electrodes and active layers improve short-channel TFT integration for ultra-high-resolution panels while guarding against circuit breaks.