Dual-Voltage Pixel Circuitry for Small-Pitch LCoS Displays
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Solution Overview
Problem
Conventional Liquid Crystal displays (LCoS) face challenges with pixel pitches smaller than 6 μm due to transistor leakage causing charge degradation in storage capacitors and require complex digital pixel circuits with many transistors for gray-scale representation.
Innovation Solution
A dual-voltage pixel circuit with a two-transistor level-shift system, utilizing static random-access memory (SRAM) and level-shift circuits, operates at two different voltages (0.9V-1.2V and 4V) to enable small pixel pitches, reducing transistor size and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional single-voltage LCoS displays use pixel pitches smaller than 6 μm, then transistor leakage causes charge degradation in storage capacitors, but increasing voltage to compensate increases transistor size and pixel circuit complexity
Solution Approach 1:
The pixel circuit is segmented into two distinct voltage domains: a low-voltage core domain (0.9V-1.2V) for logic and storage operations, and a high-voltage output domain (4V) for pixel electrode driving. This segmentation allows small transistors in the low-voltage domain to maintain charge reliably while the high-voltage domain handles the driving requirements, resolving the contradiction between small pixel pitch and charge retention.
Solution Approach 2:
A level-shift circuit acts as an intermediary between the low-voltage SRAM storage unit and the high-voltage pixel electrode. This level-shifter translates the low-voltage digital data from SRAM into the high-voltage signals needed to drive the pixel electrode, enabling small transistors to control high-voltage outputs without direct exposure to high voltage, thus maintaining reliability while achieving small pixel pitches.
2Measurement precision
If digital pixel circuits use many transistors (6-14 transistors) for gray-scale representation, then gray-scale precision improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The invention changes the voltage parameter from a single high-voltage domain to a dual-voltage domain (low-voltage 0.9V-1.2V for storage and high-voltage 4V for output). This parameter change enables the use of simple 2-transistor SRAM cells for data storage, which inherently provide stable binary states for gray-scale representation, dramatically reducing the transistor count from 6-14 to just 2 per pixel while maintaining gray-scale precision through the level-shifted voltage output.
3Power
If high-voltage transistors are used for pixel driving, then sufficient voltage output is achieved, but transistor area and pixel pitch increase
Solution Approach 1:
The transistor system is segmented into small low-voltage transistors for data storage and control in the SRAM, and a separate high-voltage transistor only in the level-shifter for voltage transformation. The small transistors operate at low voltage where they can be made very small, while the high-voltage transistor handles only the voltage transformation function, not the full pixel driving burden, enabling sufficient voltage output with minimal transistor area.
Solution Approach 2:
The level-shifter serves as an intermediary that performs voltage transformation from low-voltage (0.9V-1.2V) to high-voltage (4V) using a single high-voltage transistor. This intermediary approach allows the majority of pixel circuit transistors to remain small low-voltage devices, with only one high-voltage transistor needed for the actual voltage boosting, thereby achieving sufficient voltage output without proportionally increasing total transistor area.
Data Source
AI summary
Systems and methods for a digital pixel circuit for liquid crystal displays are provided. The design includes a dual-voltage pixel design, a two-transistor level-shift circuit design, self-adjusting transistor bias circuitry; and an optional on-chip test-array to determine die-specific design-center values for critical transistor leakage and threshold parameters. Level shift design simplicity, small pixel pitch, and applicability for small display applications such as microdisplays, are among the various benefits and advantages obtained.