Gate Driver Output Buffer Control for Faster Display Scan Signals

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Solution Overview

Problem

The challenge in display technology is the insufficient time for writing data to pixels due to the limitations of gate driver circuits, affecting display quality, particularly in larger panels with higher refresh rates.

Innovation Solution

Enhancing the driving capability of gate driver circuits by controlling the conduction states of current transmission paths in the output buffer circuit, allowing multiple paths to be conducted simultaneously to generate driving signals with shorter rising and falling times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the gate driver circuit uses conventional current transmission paths, then the circuit structure is simple, but the rising and falling times of scan signals are too long, causing insufficient time for data writing to pixels

Engineering Contradiction:
Improvedata writing time to pixelsVSAvoidoutput buffer circuit structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The output buffer circuit is segmented into multiple independent current transmission paths (first current transmission path and second current transmission path), each capable of being controlled independently. This segmentation allows the circuit to provide multiple current channels for charging and discharging the load capacitor, thereby reducing the rising and falling times of scan signals while maintaining a manageable circuit structure through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs dynamic control of current transmission paths through control signals (ENB1, ENB2, ENC1, ENC2) that can activate different current paths based on operational requirements. This dynamic switching capability allows the circuit to adaptively adjust its driving strength, providing enhanced current when fast signal transitions are needed while maintaining simpler operation during normal conditions, thus optimizing both speed and structural complexity.

Inventive Principle:
Principle #15Dynamics

2Speed

If multiple current transmission paths are conducted simultaneously, then the driving capability is enhanced with shorter rising and falling times, but the power consumption increases

Engineering Contradiction:
Improvescan signal rising and falling timeVSAvoidpower consumption of output buffer circuit
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The circuit dynamically activates specific current transmission paths based on the required signal transition. Control signals (ENB1, ENB2, ENC1, ENC2) enable or disable particular current paths depending on whether charging or discharging is needed and how fast the transition should be. This dynamic control allows the circuit to use multiple paths simultaneously only when high-speed performance is required, rather than continuously consuming power from all paths.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes operational parameters by selectively activating different current transmission paths. When fast rising or falling edges are needed, the circuit activates multiple current paths in parallel to increase the total current driving capability. When speed requirements are lower, fewer paths are activated, thereby reducing power consumption. This parameter adjustment allows optimization of the trade-off between speed and power consumption based on real-time display refresh requirements.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12592175B2Gate driver circuit and method for driving display panel
Publication Date: 2026.03.31 NOVATEK MICROELECTRONICS CORP
  • US12592175B2 patent drawing
  • US12592175B2 patent drawing
  • US12592175B2 patent drawing

AI summary

A gate driver circuit configured to drive a display panel is provided. The gate driver circuit includes an output buffer circuit and a controller circuit. The output buffer circuit includes a plurality of current transmission paths. The output buffer circuit is configured to output a driving signal to drive the display panel. The controller circuit is coupled to the output buffer circuit. The controller circuit is configured to control conduction states of the current transmission paths of the output buffer circuit.