Display Substrate Low Temperature Wet Etching Fabrication

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Solution Overview

Problem

Conventional display substrate fabrication processes require high temperature deposition and dry etching, leading to organic layer decomposition and contamination, as well as the need for complex patterning steps, which increase costs and complexity.

Innovation Solution

The display substrate is fabricated by forming the first insulating layer and thin film transistor before the organic layer, with the second electrode deposited subsequent to the organic layer using low temperature wet etching, eliminating the need for high temperature processes and reducing the complexity of patterning.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If high temperature deposition and dry etching are used in conventional fabrication processes, then manufacturing precision and reliability are improved, but organic layer decomposition and contamination occur, increasing device complexity and reducing ease of manufacture

Engineering Contradiction:
Improvefabrication precisionVSAvoidorganic layer decomposition and contamination
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent changes the temperature parameter from high temperature to low temperature deposition process, and replaces dry etching with wet etching, thereby avoiding organic layer decomposition and contamination while maintaining fabrication precision

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the dry etching process with a wet etching process, replacing a more aggressive mechanical/chemical system with a gentler chemical system that does not cause organic layer damage

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If complex patterning steps are used to achieve precise electrode and transistor formation, then manufacturing precision is improved, but device complexity and manufacturing costs increase

Engineering Contradiction:
Improvepattern formation precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple patterning steps into a single wet etching process that forms electrodes, insulating layers, and transistor structures simultaneously, reducing fabrication complexity while maintaining precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The wet etching process serves multiple functions: forming electrodes, creating insulating layer patterns, and defining transistor structures, thereby reducing the number of separate patterning steps required

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach avoids organic layer decomposition, simplifies the fabrication process, and lowers manufacturing costs by eliminating high temperature deposition and dry etching, while maintaining the integrity of the display substrate.

Implementation Method 1

the second electrode deposited subsequent to the organic layer using low temperature wet etching

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS10204928B2Display substrate, liquid crystal display panel and display apparatus having the same, and fabricating method thereof
Publication Date: 2019.02.12 BOE TECHNOLOGY GROUP CO LTD
  • US10204928B2 patent drawing
  • US10204928B2 patent drawing
  • US10204928B2 patent drawing

AI summary

The present application discloses a display substrate comprising a base substrate; a first electrode on the base substrate; a first insulating layer on a side of the first electrode distal to the base substrate; a thin film transistor on a side of the first insulating layer distal to the first electrode; a second insulating layer on a side of the thin film transistor distal to the first insulating layer; an organic layer on a side of the second insulating layer distal to the thin film transistor; and a second electrode on a side of the organic layer distal to the second insulating layer.