Display Transistor Insulating Stack Against Moisture and Hydrogen

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Solution Overview

Problem

Current display devices face challenges in enhancing the operational characteristics of transistors, particularly in preventing moisture penetration and ensuring effective channel lengths, which affects the reliability of the transistors and overall display devices.

Innovation Solution

A display device structure incorporating a transistor with a specific insulating layer configuration, including a first layer of silicon oxide, a second layer of silicon oxynitride, and a third layer of silicon nitride, where the second layer has a nitrogen content of 1-10 atomic % and a thickness of 1000-2000 Å, and the third layer has a nitrogen content of 30-60 atomic % and a thickness of 1000-2000 Å, effectively covering the active layer and gate electrode to prevent hydrogen infiltration and moisture penetration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single-layer insulating structure is used to cover the gate electrode, then the device complexity is reduced, but moisture penetration and hydrogen infiltration occur, deteriorating transistor reliability

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidinsulating layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a composite insulating layer structure consisting of three distinct layers: a first insulating layer (silicon oxide), a second insulating layer (silicon oxynitride with 1-10 atomic % nitrogen), and a third insulating layer (silicon nitride with 30-60 atomic % nitrogen). Each layer provides different protective functions, with the nitrogen-containing layers specifically preventing hydrogen infiltration and all layers collectively blocking moisture penetration, thereby resolving the contradiction between reliability improvement and structural complexity.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The insulating layer is segmented into three separate functional layers rather than using a single homogeneous layer. The first layer (silicon oxide) provides baseline insulation, the second layer (silicon oxynitride) provides intermediate protection with low nitrogen content, and the third layer (silicon nitride) provides high-level protection against hydrogen infiltration with high nitrogen content. This segmentation allows each layer to optimize its specific function while collectively solving the moisture and hydrogen penetration problems.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the second layer thickness is increased to improve moisture barrier properties, then moisture penetration prevention is enhanced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemoisture barrier performanceVSAvoidlayer thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies precise parameter ranges for the second layer: nitrogen content of 1-10 atomic % and thickness of 1000-2000 Å. By defining these parameter ranges rather than requiring exact values, the invention balances moisture barrier performance with manufacturing feasibility. The nitrogen content parameter is particularly important as it provides the optimal balance between barrier properties and control precision in typical semiconductor manufacturing processes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the third layer nitrogen content is increased to enhance hydrogen infiltration prevention, then transistor operational characteristics improve, but manufacturing complexity increases

Engineering Contradiction:
Improvetransistor operational characteristicsVSAvoidnitrogen content control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent specifies that the third layer (silicon nitride) should have a nitrogen content of 30-60 atomic %. This parameter range is optimized to provide effective hydrogen infiltration prevention while remaining compatible with standard semiconductor manufacturing processes. The lower bound (30 atomic %) ensures sufficient hydrogen barrier properties, while the upper bound (60 atomic %) maintains manufacturability using conventional plasma-enhanced chemical vapor deposition or other standard techniques.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the operational characteristics of transistors by stabilizing the channel lengths and preventing hydrogen infiltration, thereby improving the reliability and yield of the display device.

Implementation Method 1

a second layer disposed on the first layer and including silicon oxynitride... effectively covering the active layer and gate electrode to prevent hydrogen infiltration and moisture penetration

Methodology Applied
Scientific EffectDiffusion Barrier: Diffusion Barrier

Implementation Method 2

a first insulating layer disposed on the gate electrode and including a first layer covering the active layer, the gate insulating layer, and the gate electrode... effectively covering the active layer and gate electrode to prevent hydrogen infiltration and moisture penetration

Methodology Applied
Scientific EffectPermeation Barrier: Permeation

Data Source

PatentUS20250105229A1Display device and method of manufacturing the same
Publication Date: 2025.03.27 SAMSUNG DISPLAY CO LTD
  • US20250105229A1 patent drawing
  • US20250105229A1 patent drawing
  • US20250105229A1 patent drawing

AI summary

A display device includes a transistor including an active layer disposed on a substrate and a gate electrode disposed on the active layer, a gate insulating layer disposed between the active layer and the gate electrode, and a first insulating layer disposed on the gate electrode. The first insulating layer may include a first layer covering the active layer, the gate insulating layer, and the gate electrode and including silicon oxide, a second layer disposed on the first layer and including silicon oxynitride, and a third layer disposed on the second layer and including silicon nitride.