Display Transistor Layout With Protective Layer and Isolation Groove
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Solution Overview
Problem
Reducing the number of photolithography steps in the manufacturing process of transistors for liquid crystal and EL display devices to improve reliability and reduce production costs without increasing the number of photomasks, while minimizing semiconductor layer deterioration during etching steps.
Innovation Solution
A semiconductor device design that omits the photolithography step for forming an island-shaped semiconductor layer, using a protective layer with openings to connect electrodes to the semiconductor layer, and incorporating a groove portion to prevent parasitic transistor formation, thereby reducing damage to the semiconductor layer and maintaining high reliability without additional photomasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If photolithography steps are reduced to simplify manufacturing process, then manufacturing complexity and cost are reduced, but semiconductor layer deterioration increases due to exposure to etching gas or etchant
Solution Approach 1:
A protective layer is formed over the semiconductor layer before etching steps to prevent damage. This preliminary protective measure allows the semiconductor layer to be exposed to etching gas or etchant without deterioration, enabling process simplification while maintaining reliability.
Solution Approach 2:
The protective layer acts as an intermediary between the etching process and the semiconductor layer. It shields the semiconductor layer from direct contact with harmful etching substances while allowing the etching process to proceed, thus resolving the contradiction between process simplification and layer protection.
2Ease of manufacture
If photolithography steps are reduced to reduce production cost, then manufacturing cost is reduced, but transistor reliability deteriorates due to increased semiconductor layer damage
Solution Approach 1:
The protective layer is formed in advance before etching steps to prevent semiconductor layer damage. This allows the use of simplified manufacturing processes with fewer photolithography steps while maintaining transistor reliability through the preliminary protective measure.
Solution Approach 2:
The protective layer converts the potentially harmful etching process into a beneficial simplified manufacturing process. By shielding the semiconductor layer, it enables the use of direct etching methods that reduce production cost and complexity while maintaining reliability.
3Reliability
If protective layer is added to suppress semiconductor layer deterioration, then semiconductor layer integrity is improved, but manufacturing process complexity increases due to additional photolithography steps
Solution Approach 1:
The protective layer formation is merged with existing manufacturing steps. The protective layer is formed as part of the insulating layer structure, and its openings are formed during the same photolithography step used for other patterning operations, thus adding minimal complexity while achieving protection.
Solution Approach 2:
The protective layer serves multiple functions: it protects the semiconductor layer from etching damage, acts as part of the insulating layer structure, and its openings provide electrical connections. This multi-functionality reduces the need for separate dedicated protective structures and steps.
4Reliability
If groove portion is formed to prevent parasitic transistor formation, then transistor reliability is improved, but manufacturing process complexity increases due to additional etching steps
Solution Approach 1:
The groove portion formation is merged with the opening formation step. The same etching process that creates openings in the protective layer also forms the groove portions by removing the insulating layer in specific regions, thus achieving parasitic transistor prevention without adding separate etching steps.
Solution Approach 2:
The groove portions segment the insulating layer to prevent continuous parasitic transistor formation. By creating localized removals in the insulating layer at strategic positions, the structure is segmented to block parasitic current paths while maintaining the overall integrity of the protective and insulating layers.
Data Source
AI summary
A display device is manufactured with five photolithography steps: a step of forming a gate electrode, a step of forming a protective layer for reducing damage due to an etching step or the like, a step of forming a source electrode and a drain electrode, a step of forming a contact hole, and a step of forming a pixel electrode. The display device includes a groove portion which is formed in the step of forming the contact hole and separates the semiconductor layer.