Display Transistor Electrode Layout for Precise LED Alignment

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Solution Overview

Problem

Current display device fabrication processes are complex and do not ensure reliable device performance due to issues with electrode alignment and material integration, leading to potential defects and reduced efficiency in light emission.

Innovation Solution

A simplified fabrication process for a display device involving a semiconductor pattern on a substrate with insulating layers and electrodes on the same layer, where the source and drain electrodes contact the semiconductor pattern through defined openings, and light emitting elements are integrated between these electrodes, with a bottom conductive layer and bank structures to enhance alignment and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional multi-layer electrode fabrication is used, then electrode alignment precision may be improved, but fabrication process complexity increases

Engineering Contradiction:
Improveelectrode alignment precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the gate electrode, source electrode, and drain electrode into a single fabrication layer. This is achieved by forming all three electrodes simultaneously through a single patterned deposition process, eliminating the need for multiple sequential layer formations and alignments. The electrodes are spaced apart on the same layer, sharing common insulating and semiconductor structures beneath them, which simplifies the overall fabrication process while maintaining precise relative positioning through a single patterning step.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If simplified fabrication process is used, then manufacturing efficiency is improved, but device reliability may deteriorate

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent incorporates preliminary design features into the single-layer electrode structure that pre-compensate for potential reliability issues. The gate electrode extends beyond the semiconductor pattern to form a gate pad, and the source and drain electrodes include exposed tail portions, allowing for robust electrical connections before final assembly. These preliminary structural provisions ensure reliable electrical contact and device performance despite the simplified fabrication process.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If electrodes are on the same layer, then fabrication steps are reduced, but electrode spacing control difficulty increases

Engineering Contradiction:
Improvefabrication stepsVSAvoidelectrode spacing control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent introduces the insulating layer as an intermediary structure that mediates the spacing between electrodes. The gate electrode, source electrode, and drain electrode are all formed on top of the insulating layer, which provides a stable reference plane and physical separation. The insulating layer's thickness and material properties serve as controlling parameters for electrode spacing, transforming a direct spacing control problem into a more manageable layer-based dimensional control that can be achieved through standard thin film deposition processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4239684A1Transistor and display device
Publication Date: 2023.09.06 SAMSUNG DISPLAY CO LTD
  • EP4239684A1 patent drawingFigure 1~2
  • EP4239684A1 patent drawingFigure 3
  • EP4239684A1 patent drawingFigure 4

AI summary

Provided herein are a display device and a transistor. The display device may comprise a semiconductor pattern on a substrate and defining a hole, an insulating layer on the semiconductor pattern, and defining an opening area overlapping the hole, a gate electrode, a source electrode contacting a conductive area of the semiconductor pattern through the opening area, and a drain electrode on the insulating layer, electrodes respectively on the gate electrode, the source electrode, and the drain electrode, and spaced apart from each other, and light emitting elements between the electrodes, respectively.