Display Substrate Via Structure to Prevent Pixel Contact Oxidation
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Solution Overview
Problem
The process of preparing a color resist layer on a display substrate leads to serious oxidation of metal at the bottom of pixel via holes, increasing contact resistance between the pixel electrode and the drain electrode, resulting in poor display performance.
Innovation Solution
A display substrate design featuring a thin film transistor structure with specific via holes that penetrate through multiple insulating layers, including a color resist layer and an organic material layer, using a dry etching process with nitrogen trifluoride and oxygen to expose the source-drain metal layer and gate metal layer, while maintaining a controlled thickness to prevent premature oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the color resist layer is prepared early in the manufacturing process, then the manufacturing sequence is simplified, but the metal at the bottom of pixel via holes suffers from serious oxidation leading to increased contact resistance
Solution Approach 1:
The color resist layer is prepared in advance before the via holes are formed, and the insulating layers are designed with appropriate thicknesses to prevent premature exposure of the metal layer. This preliminary arrangement of layers protects the metal from oxidation while maintaining manufacturing simplicity.
Solution Approach 2:
Multiple insulating layers (first insulating layer with thickness 3500-4500 angstroms, second insulating layer with thickness 800-1200 angstroms) are introduced as intermediary protective barriers between the metal layer and the color resist layer. These intermediary layers prevent direct contact and oxidation of the metal while allowing the color resist layer to be prepared early in the process.
2Reliability
If via holes are formed to expose the source-drain metal layer, then electrical connection is established, but the metal layer is prematurely exposed and oxidized
Solution Approach 1:
The via holes are formed after the color resist layer and insulating layers are prepared, and the etching process is carefully controlled to expose the metal layer only when necessary. The color resist layer with thickness 1.0-2.0 μm serves as a preliminary protective barrier that delays metal exposure and prevents oxidation until the via holes are formed.
Solution Approach 2:
The color resist layer and insulating layers are selectively positioned and removed only in the specific regions where via holes are needed. This local quality approach ensures that the metal layer is protected from oxidation in most areas while being exposed only where electrical connection is required.
3Reliability
If the color resist layer thickness is increased to prevent oxidation, then metal protection is improved, but the etching process becomes more complex
Solution Approach 1:
The thickness parameters of the color resist layer (1.0-2.0 μm) and insulating layers are optimized to provide adequate metal protection without excessive thickness. This parameter optimization ensures sufficient protection against oxidation while keeping the etching process manageable and not overly complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the influence on contact resistance, increases product yield, and improves display performance by avoiding premature exposure and oxidation of the metal layers during the etching process.
Implementation Method 1
performing a dry etching process in the first via hole and the second via hole
Implementation Method 2
performing a dry etching process in the first via hole and the second via hole, so that the first via hole extends to the source-drain metal layer
Data Source
AI summary
Embodiments of the disclosure provide a display substrate and a method for manufacturing the same. The display substrate includes: a base substrate; a thin film transistor including a source-drain metal layer and a first insulating layer; a second insulating layer; a color resist layer; and a third insulating layer. The third insulating layer comprises a first via hole that sequentially penetrates the third insulating layer, the color resist layer and the second insulating layer and thus extends from the third insulating layer to the source-drain metal layer. A sidewall of the first via hole comprises a first portion formed of a material of the second insulating layer, a second portion formed of a material of the color resist layer, and a third portion formed of a material of the third insulating layer, the second portion is between the first portion and the third portion.


