Active Matrix Display Wiring Pattern Optimization
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Solution Overview
Problem
Conventional image display apparatuses face challenges in efficiently arranging wiring patterns on insulating substrates, leading to increased frame size and reduced yield due to the complexity and occupation of space by wiring patterns, as well as potential short-circuit accidents.
Innovation Solution
The proposed solution involves forming a display unit with pixel circuits arranged in a matrix on an insulating substrate, where the integrated circuits for signal and scanning lines are connected via efficiently arranged wiring patterns. This includes using a dummy region at the outermost periphery for the scanning line coupling and pitch conversion regions, and commonly utilizing the power supply scanning line between odd- and even-numbered pixel circuits to reduce the proportion of wiring patterns per pixel and enhance yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If wiring patterns are arranged to connect integrated circuits for signal and scanning lines, then the display unit can be formed on the insulating substrate, but the frame becomes larger and the wiring pattern occupies more space
Solution Approach 1:
The patent applies dimensionality change by transitioning from a one-to-one correspondence between integrated circuit terminals and display unit wiring patterns to a many-to-many relationship. Multiple scanning line wiring patterns share common segments, reducing the total wiring pattern area and enabling a narrower frame while maintaining functional connectivity.
Solution Approach 2:
The patent merges multiple scanning line wiring patterns into shared common segments. Instead of having separate wiring patterns for each scanning line, the design combines them into共用 segments that serve multiple scanning lines simultaneously, thereby reducing the overall wiring pattern occupation area and narrowing the frame.
2Reliability
If wiring patterns occupy more space, then connectivity can be maintained, but the yield is reduced due to potential short-circuit accidents
Solution Approach 1:
The patent extracts and eliminates redundant wiring pattern segments by introducing a dummy region that absorbs excess wiring patterns. This removes unnecessary wiring that could cause short-circuit accidents, thereby improving yield without compromising the functionality of the display unit.
Solution Approach 2:
The patent converts the potentially harmful excess wiring patterns into a beneficial dummy region. The dummy region absorbs the surplus wiring patterns that would otherwise increase short-circuit risk, transforming a harmful factor (excess wiring) into a useful structural element that improves reliability and yield.
3Area of stationary object
If a dummy region is arranged at the outermost periphery for scanning line coupling and pitch conversion, then wiring patterns can be efficiently arranged and frame narrowed, but the display unit area is reduced
Solution Approach 1:
The patent applies local quality by creating a dummy region with specific local characteristics at the periphery of the insulating substrate. This dummy region has different functional properties from the main display unit, serving as a specialized area for absorbing excess wiring patterns and enabling efficient wiring arrangement without affecting the overall display functionality.
Data Source
AI summary
The present invention provides an active matrix image display apparatus including an organic EL element capable of efficiently arranging a wiring pattern on an insulating substrate compared to the related art. The present invention provides a dummy region arranged at the outermost periphery of a display unit as a scanning line coupling region or a pitch conversion region. A power supply scanning line is commonly used by a pixel circuit of an odd-numbered line and a pixel circuit of a following even-numbered line.