Distributed Power Amplifier Bias Network for Wideband PAE
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Solution Overview
Problem
Wideband high power amplifiers (HPAs) face limitations in power added efficiency (PAE) and output match due to reduced performance of their components compared to narrow band systems, and isolators may not be effective across wide bandwidths, leading to poor input impedance and performance degradation.
Innovation Solution
A distributed power amplifier design using two field effect transistors (FETs) with artificial transmission lines connecting their gates and drains, operating at reduced voltage to minimize frequency limiting effects and achieve high PAE across a wide band, eliminating the need for resistive elements in the drain bias network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wideband amplifier designs are used, then bandwidth is improved, but power added efficiency deteriorates
Solution Approach 1:
The amplifier is divided into multiple distributed stages, each contributing to the overall gain while maintaining efficiency. The segmentation allows each stage to operate optimally across the bandwidth, preventing the efficiency degradation that would occur in a single wideband stage.
Solution Approach 2:
The patent transforms the drain bias network from a resistive to a reactive configuration, changing the electrical parameters to reduce power loss. This parameter change enables the wideband amplifier to maintain high PAE by eliminating the inherent power dissipation in resistive bias networks.
2Adaptability or versatility
If wideband amplifier designs are used, then bandwidth is improved, but performance deteriorates
Solution Approach 1:
The amplifier employs dynamic load pull compensation through the reactive drain bias network, allowing the output match to be maintained across varying load conditions and frequencies. This dynamic adaptation ensures consistent electrical performance throughout the wide bandwidth.
Solution Approach 2:
The distributed architecture with reactive biasing creates inherent feedback mechanisms that stabilize the amplifier's performance across the bandwidth, compensating for variations in component characteristics and load conditions.
3Reliability
If isolators are used to electrically isolate HPA from antenna, then isolation is improved, but availability deteriorates
Solution Approach 1:
The patent removes the isolator component from the system by implementing intrinsic isolation through the reactive drain bias network and distributed amplifier architecture. This extraction eliminates the bandwidth limitation imposed by isolators while maintaining the necessary isolation function.
Solution Approach 2:
The reactive drain bias network performs multiple functions simultaneously: it provides the necessary DC biasing, creates output isolation, and maintains impedance match across the bandwidth. This multi-functionality replaces the specialized isolator component with a universal bias network that operates across all frequencies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves high PAE and improved impedance matching, resulting in flat gain versus frequency and enhanced output return loss, with PAE approaching that of narrow band amplifiers, while maintaining wideband performance without degrading power added efficiency.
Implementation Method 1
a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor
Data Source
AI summary
A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.