Distributed Non-Volatile RAM Tiles for Reconfigurable Logic Routing
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Solution Overview
Problem
Reconfigurable logic devices face increased routing overhead and performance issues due to the distance between processing units and memory blocks, and the use of volatile memory units introduces noise sensitivity and the need for additional non-volatile memory, complicating device design and operation.
Innovation Solution
A reconfigurable logic device with an array of tiles, each comprising a processing unit with volatile configuration memory and a non-volatile Random Access Memory (RAM) unit, connected through a routing network, allowing for flexible switching between processing and RAM functions using MRAM or FeRAM units, which are evenly distributed across the array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If embedded memory blocks are used in known reconfigurable devices, then memory capacity is provided, but routing overhead increases due to the distance between processing units and memory blocks
Solution Approach 1:
The patent divides the memory system into multiple small memory units distributed throughout the array, with each processing unit having a locally associated memory unit, rather than using a single large embedded memory block. This segmentation reduces routing overhead by placing memory closer to processing units.
Solution Approach 2:
The patent integrates memory units within the same array plane as processing units, effectively using the two-dimensional array space more efficiently. This co-location in the same dimensional space eliminates the need for long-distance routing to separate memory blocks.
2Device complexity
If volatile memory units are used to decrease routing overhead, then routing overhead is reduced, but noise sensitivity increases and additional non-volatile memory is required
Solution Approach 1:
The patent merges the functions of volatile and non-volatile memory into a single integrated memory unit. The non-volatile memory serves both as permanent storage and as the operational memory, eliminating the need for separate volatile memory and configuration memory systems.
Solution Approach 2:
The non-volatile memory unit performs multiple functions: it serves as permanent storage for preserving programming, as operational memory for data storage, and as configuration memory for the processing unit. This multi-functionality eliminates the need for additional dedicated memory components.
3Stability of the object's composition
If volatile memory units are used to spread memory evenly throughout the array, then memory distribution is improved, but the need for additional non-volatile memory increases device complexity
Solution Approach 1:
The patent combines volatile and non-volatile memory functions into a single non-volatile memory unit, eliminating the need for separate memory components. This integration maintains even memory distribution throughout the array while reducing overall device complexity.
Solution Approach 2:
The non-volatile memory unit serves multiple purposes including permanent storage, operational memory, and configuration storage, replacing what would traditionally require multiple separate memory components. This multi-functionality reduces device complexity while maintaining distributed memory architecture.
4Device complexity
If volatile memory units are used to decrease routing overhead, then routing overhead is reduced, but read and write errors increase due to noise sensitivity
Solution Approach 1:
The patent merges volatile and non-volatile memory into a single non-volatile memory unit that maintains the routing benefits of distributed memory while providing the noise immunity and reliability of non-volatile technology.
Solution Approach 2:
The patent changes the fundamental parameter of memory volatility from volatile to non-volatile, thereby maintaining the spatial distribution benefits while improving noise immunity and reducing read/write errors through the inherent stability of non-volatile memory technology.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces routing overhead, enhances performance by allowing local RAM access, simplifies application placement and routing, and optimizes area and timing without increasing device complexity or noise susceptibility.
Implementation Method 1
The Random Access Memory unit may be one of a Magnetoresistive Random Access Memory (MRAM) unit and a Ferroelectric Random Access Memory (FeRAM) unit.
Implementation Method 2
The Random Access Memory unit may be one of a Magnetoresistive Random Access Memory (MRAM) unit and a Ferroelectric Random Access Memory (FeRAM) unit.
Data Source
AI summary
A reconfigurable logic device comprises an array of tiles interconnected through a routing network, each tile comprises both a processing unit including volatile configuration memory and a Random Access Memory unit.