Distributed Refresh Control for Dynamic Memory Power Reduction

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Solution Overview

Problem

System-on-chip (SOC) devices face reduced processing speed and increased power consumption due to the need for periodic memory refreshing, which requires bringing the entire memory array out of a low power state, affecting performance and power management.

Innovation Solution

Implementing a distributed refresh control method where local refresh controllers manage individual memories, receiving refresh opportunity commands from a master refresh controller, and refreshing only when necessary, thereby minimizing the number of clock cycles and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire memory array is brought out of low power state for periodic refreshing using a global refresh controller, then all memories are refreshed reliably, but power consumption increases and processing speed decreases

Engineering Contradiction:
Improvememory refresh reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory array is segmented into multiple independent memory banks, each with its own local refresh controller. This allows selective refreshing of individual banks rather than the entire array, enabling banks that are not currently accessed to be refreshed while others remain in low power state, thus reducing overall power consumption while maintaining refresh reliability for each bank

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The refresh control system dynamically determines which memory banks need refreshing based on access patterns. The local refresh controllers receive refresh opportunity commands and autonomously manage refresh operations for their respective banks, adapting refresh activity to actual memory usage rather than using fixed periodic global refreshes

Inventive Principle:
Principle #15Dynamics

2Reliability

If the entire memory array is brought out of low power state for periodic refreshing, then all memories are refreshed, but processing speed is reduced

Engineering Contradiction:
Improvememory refresh completenessVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By dividing the memory array into independent banks with separate refresh controllers, the system can perform refresh operations on individual banks without affecting other banks. This segmentation allows processing to continue on non-refreshed banks, eliminating the need to halt entire array operations and thus maintaining processing speed while ensuring refresh completeness

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system proactively identifies refresh opportunities by monitoring memory access patterns and determines which banks need refreshing before processing demands arise. This preliminary identification allows refresh operations to be scheduled during idle periods or when banks are naturally inaccessible, ensuring refresh completeness without impacting processing speed

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If global refresh controller manages entire memory array, then refresh coordination is simplified, but power consumption and processing speed are adversely affected

Engineering Contradiction:
Improverefresh control structureVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The refresh control function is segmented between a master refresh controller that coordinates overall refresh opportunities and multiple local refresh controllers that execute refresh operations for individual banks. This segmentation distributes control responsibilities, allowing the system to maintain coordination simplicity while reducing power consumption through selective bank refreshing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The master refresh controller acts as an intermediary that sends refresh opportunity commands to local refresh controllers based on overall memory array status. This intermediary role allows centralized coordination logic to remain simple while delegating autonomous refresh decisions to local controllers, reducing power consumption without significantly increasing overall system complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8347027B2Reducing power consumption for dynamic memories using distributed refresh control
Publication Date: 2013.01.01 HONEYWELL INTERNATIONAL INC
  • US8347027B2 patent drawing
  • US8347027B2 patent drawing
  • US8347027B2 patent drawing

AI summary

A method for refreshing memory is provided. The method comprises determining when a first memory of a plurality of memories is not being accessed and sending a refresh opportunity command from a master refresh controller to one of a plurality of local refresh controllers when the first memory is not being accessed, wherein the one of a plurality of local refresh controllers controls only the first memory. The method further comprises determining when the first memory needs refreshing and refreshing the first memory.