Domain Wall Memory Nanowire Architecture for DSP Area and Power Reduction
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Solution Overview
Problem
Conventional digital signal processors (DSPs) face challenges in power consumption and area occupancy due to their reliance on static random access memory (SRAM), which is inefficient for power-constrained devices like smartphones and IoT devices, and require asymmetrical read/write operations for non-volatile memory usage.
Innovation Solution
A domain wall memory-based memory device and digital signal processor architecture utilizing magnetic nanowires with write-read and read-only heads, employing a LIFO method for data storage and retrieval, which reduces area and power consumption while maintaining performance comparable to SRAM-based systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If SRAM-based embedded memory and flip flop-based shift register are used in conventional DSP, then data processing functionality is achieved, but area occupancy and power consumption increase significantly
Solution Approach 1:
The patent merges the memory and shift register functions into a single domain wall memory device. The magnetic nanowire structure simultaneously provides storage capability (replacing SRAM) and sequential access capability (replacing flip flop-based shift register), eliminating the need for separate components and significantly reducing area occupancy while maintaining data processing functionality
Solution Approach 2:
The domain wall memory device performs multiple functions that were previously distributed across separate components. The magnetic nanowire with domain walls provides both data storage and sequential data movement capabilities, allowing the single device to replace both SRAM and shift register functions in the DSP architecture
2Productivity
If SRAM-based embedded memory and flip flop-based shift register are used in conventional DSP, then data processing functionality is achieved, but power consumption increases significantly
Solution Approach 1:
The patent merges the memory and shift register functions into a single domain wall memory device. The magnetic nanowire structure simultaneously provides storage capability (replacing SRAM) and sequential access capability (replacing flip flop-based shift register), eliminating the need for separate components and significantly reducing area occupancy while maintaining data processing functionality
Solution Approach 2:
The patent replaces the mechanical/electrical switching mechanisms of SRAM and flip flops with a magnetic domain wall-based system. The domain wall movement and spin-transfer torque mechanisms enable data storage and sequential access without requiring the same power-intensive electrical switching operations, thereby reducing overall power consumption
3Area of stationary object
If non-volatile memory with asymmetrical read and write operations is used, then area and power consumption are reduced, but memory access pattern compatibility with sequential access requirements becomes problematic
Solution Approach 1:
The patent introduces dynamic control mechanisms including a write enable signal and read enable signal that allow the domain wall memory to adapt its operation mode based on access requirements. The ability to dynamically switch between write and read operations with proper sequencing enables compatibility with sequential access patterns while maintaining the area and power benefits of non-volatile memory
Solution Approach 2:
The patent implements control logic that monitors and coordinates write and read operations through enable signals. This feedback mechanism ensures that read operations can access data that has been recently written, maintaining sequential access compatibility while utilizing the asymmetrical read/write characteristics of non-volatile memory for area and power optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The domain wall memory-based solution effectively minimizes energy and space usage while ensuring performance comparable to SRAM-based systems, making it suitable for power-constrained devices like smartphones and IoT devices.
Implementation Method 1
a magnetic nanowire including multiple cells; a write-read head combined with a first contact of the magnetic nanowire
Implementation Method 2
data stored through a write head included in the write-read head
Implementation Method 3
data stored through a write head included in the write-read head are read in sequence through a read head included in the write-read head
Data Source
AI summary
At least one magnetic nanowire including multiple cells; a write-read head combined with a first contact of the magnetic nanowire; and a read-only head combined with a second contact of the magnetic nanowire. Data stored through a write head included in the write-read head are read in sequence through a read head included in the write-read head in response to a last in first out (LIFO) method.