Domain Wall Logic with MTJ Readout for Low-Voltage Switching

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Solution Overview

Problem

Heat generated by transistors limits the speed of modern integrated circuits, and existing logic devices require high voltage supplies, leading to significant power dissipation, which is inefficient and wasteful.

Innovation Solution

A logic device based on a short, narrow soft ferromagnetic wire with a magnetic tunnel junction and antiferromagnets to pin magnetization, allowing for low-voltage operation through current-induced domain wall motion, enabling Boolean logic operations with reduced energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If traditional CMOS transistors are used for logic operations, then reliable switching can be achieved, but high voltage supplies greater than 0.5 V are required leading to significant power dissipation

Engineering Contradiction:
Improvepower dissipationVSAvoidswitching reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent replaces traditional CMOS transistor switching mechanisms with magnetic domain wall motion. Instead of using voltage-controlled electrical switching in transistors, the invention uses current-induced spin transfer torque to move domain walls between pinned and free magnetic layers, achieving logic operations through magnetic rather than electrical mechanisms. This substitution enables operation at much lower voltages (less than 0.5 V) while maintaining reliable switching through the magnetic tunnel junction's tunneling magnetoresistance effect.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If higher operating voltages are used to ensure reliable switching, then switching reliability improves, but heat generation increases limiting circuit speed

Engineering Contradiction:
Improveswitching reliabilityVSAvoidcircuit speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent fundamentally changes the operating voltage parameter from traditional CMOS levels (greater than 0.5 V) to ultra-low voltage levels (less than 0.5 V, and in some embodiments less than 0.1 V). This parameter change is achieved by utilizing the magnetic tunnel junction's ability to detect domain wall position through tunneling magnetoresistance, which provides sufficient signal contrast at very low voltages. The reliability is maintained through the use of pinned magnetic layers that provide stable reference states and the high sensitivity of the MTJ readout mechanism.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables efficient, low-voltage Boolean logic operations with scalable design, achieving competitive energy consumption with CMOS technology while operating at lower supply voltages, thus addressing the inefficiencies of traditional logic devices.

Implementation Method 1

readout can be accomplished using tunneling magnetoresistance

Methodology Applied
Scientific EffectTunneling magnetoresistance: Magnetoresistance

Implementation Method 2

Antiferromagnets are deposited on both ends of the wire to pin the magnetization at the ends through exchange bias

Methodology Applied
Scientific EffectExchange bias: Magnetism

Implementation Method 3

Logic devices based on the current-induced motion of a single domain wall within a short ferromagnetic bar

Methodology Applied
Scientific EffectCurrent-induced domain wall motion: Magnetism

Data Source

PatentUS9208845B2Low energy magnetic domain wall logic device
Publication Date: 2015.12.08 MASSACHUSETTS INST OF TECH
  • US9208845B2 patent drawing
  • US9208845B2 patent drawing
  • US9208845B2 patent drawing

AI summary

A logic gate device is disclosed. The logic gate device structure can include a magnetic tunnel junction on a soft ferromagnetic wire to provide a readout. One input contact can be at one end of the soft ferromagnetic wire and a second input contact can be at the other end of the soft ferromagnetic wire to control domain wall position in the soft ferromagnetic wire.