Dome-Shaped MTJ Top Electrode Formation for MRAM
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Solution Overview
Problem
Conventional etching processes damage the shallow and small top electrode (TE) of magnetic tunnel junction (MTJ) structures in MRAM devices, leading to operational issues due to process variation and low oxide etch selectivity of silicon nitride (SiN) sidewalls, resulting in compromised MTJ performance.
Innovation Solution
A method is developed to form a dome-shaped MTJ TE structure by forming trenches through the SiN layer, depositing a tantalum nitride (TaN) layer, and etching it to create domed-shaped TaN layers over the MTJ structures, along with forming SiN spacers and oxide layers to ensure precise placement and protection of the MTJ structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional etching processes are used to form MTJ top electrode, then the etching process can remove material, but the shallow and small MTJ TE (40 nm CD) is damaged and removed due to process variation exceeding 40 nm
Solution Approach 1:
The patent applies preliminary action by forming a protective oxide layer over the MTJ structure before etching, and by using a two-stage etching approach where first trenches are formed through the oxide layer to expose MTJ TEs, followed by second trenches formation. This preliminary protective oxide layer and staged etching approach prevents direct damage to the shallow MTJ TEs during conventional etching processes.
Solution Approach 2:
The patent introduces an oxide layer as an intermediary protective layer between the etching process and the MTJ top electrode. This oxide layer acts as a mediator that protects the sensitive MTJ TE during etching operations, allowing material removal without directly exposing the shallow electrode to damaging etchants.
2Shape
If SiN layer is used for MTJ sidewalls, then sidewall formation is achieved, but oxide etch selectivity is low and sidewalls are damaged due to low temperature processing
Solution Approach 1:
The patent changes the material parameter of the sidewall layer from SiN to oxide material, which provides high oxide etch selectivity. This parameter change allows the sidewalls to withstand the etching process without damage, improving reliability while maintaining the necessary shape definition for MTJ structures.
Solution Approach 2:
The patent uses a disposable protective oxide layer that is formed over the MTJ structure, performs its protective function during etching, and is subsequently removed. This temporary protective layer sacrifices itself to protect the permanent MTJ sidewalls from damage during the etching process.
3Productivity
If CMP and etching processes are used for MTJ fabrication, then material removal and planarization are achieved, but process variation exceeds 40 nm causing no manufacturing process window
Solution Approach 1:
The patent segments the single etching process into two distinct stages: first etching to form trenches through the oxide layer and expose MTJ TEs, and second etching to form additional trenches. This segmentation allows better control over each etching step, reducing cumulative process variation and creating a manufacturable process window for the 40 nm CD MTJ TEs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach addresses the top connection challenges and reduces the likelihood of MTJ open and short concerns by centering the domed-shaped TE structure with sufficient overetch and avoiding sidewall damage, while also being cost-effective by eliminating the need for post-MTJ planarization and reducing device capacitance.
Implementation Method 1
forming a tantalum nitride (TaN) layer over the MRAM and logic stacks
Implementation Method 2
forming an oxide layer over the MRAM and logic stacks
Data Source
AI summary
Methods of fabricating a dome-shaped MTJ TE and the resulting devices are provided. Embodiments include forming a MRAM stack having a laterally separated MTJ structures and the MRAM and a logic stack each having a SiN layer; forming first trenches through the MRAM stack to a portion of the SiN layer above an MTJ structure; forming second trenches through the SiN layer fully landing on an upper portion of the MTJ structures and removing the SiN layer of the logic stack; forming a TaN layer over the MRAM and logic stack; removing portions of the TaN layer on opposite sides of the MTJ structures and therebetween; forming an oxide layer over the MRAM and logic stacks; and forming vias through the oxide layer of the MRAM stack down the TaN layer above MTJ structures and a via through the logic stack.