Domino Read Local Evaluation Circuit for Double Pumped SRAM
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Solution Overview
Problem
In double pumped SRAM arrays, the frequent precharging and discharging of global and local bitlines during read and write operations lead to high power consumption, as there is no logic to prevent unnecessary discharging, especially when writing a '0', resulting in inefficient power usage due to frequent device switching.
Innovation Solution
A novel domino read local evaluation circuit predicts the write data for the next cycle by using static write data setup prior to the write enable signal, keeping bitlines in their previous state when data matches and precharging only when data differs, reducing the number of devices switching during operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the global dot node is discharged during every read operation to ensure proper SRAM cell evaluation, then the read operation reliability is improved, but the power consumption increases due to frequent precharging and discharging cycles
Solution Approach 1:
The patent applies preliminary action by predicting the write data value before the write operation occurs. The prediction logic evaluates the write data early in the cycle to determine whether precharging is necessary, allowing the system to prepare appropriately in advance and avoid unnecessary precharge operations that would consume power
Solution Approach 2:
The patent implements feedback through a prediction logic mechanism that uses information about the write data to control the precharge operation. The system feeds back the predicted write data value to the precharge control logic, which then adjusts the precharge behavior accordingly - precharging only when the predicted value indicates it is necessary, thereby reducing unnecessary power consumption while maintaining read reliability
2Reliability
If the local bitlines are precharged for every write operation to ensure proper data writing, then the write operation reliability is improved, but the power consumption increases due to frequent device switching
Solution Approach 1:
The patent applies preliminary action by evaluating the write data value before the write operation is executed. The prediction logic determines in advance whether the write data differs from the previously read data, and only triggers precharging when necessary, thus ensuring write reliability while avoiding unnecessary power consumption from redundant precharge cycles
Solution Approach 2:
The patent implements feedback by using the predicted write data value to control the precharge operation. The system continuously monitors and compares write data with previously read data, feeding this information back to the precharge control logic to dynamically adjust precharge behavior, thereby maintaining write reliability while minimizing power consumption through selective precharging
3Measurement precision
If the precharge signal toggles separately for read and write operations in standard double pump operation, then the timing control precision is improved, but the device switching frequency increases leading to higher power consumption
Solution Approach 1:
The patent applies merging by combining the precharge control for read and write operations into a unified mechanism. Instead of having separate precharge signals for each operation, the system uses a single prediction-based control logic that manages precharging for both operations, reducing the total number of switching events while maintaining the necessary timing precision through the prediction mechanism
Data Source
AI summary
A method and static random access memory (SRAM) circuit for implementing low power data predicting local evaluation for double pumped arrays, and a design structure on which the subject circuit reside are provided. A novel variation of a domino read local evaluation circuit accurately predicts the write data for the next cycle. The domino read local evaluation circuit uses static write data set up prior to a write enable signal to determine the value of the data that is being written into the array. When the data being written to the array matches the data last read the local bitlines stay in their previous state. When the data being written is opposite of the data last read then the bit lines are precharged to the precharge value.