Interstitially Doped Ferroelectric Memory for Multi-State Scaling

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Solution Overview

Problem

Conventional ferroelectric memory devices face limitations in scalability, typically having only two stable polarization states due to grain size constraints, which restrict their ability to implement applications requiring more than two memory states, such as neural networks.

Innovation Solution

The introduction of interstitial dopants with atomic radii smaller than the metal oxide elements in ferroelectric materials like HfO2 and ZrO2 enhances the formation of the orthorhombic phase, reducing grain sizes and increasing the number of ferroelectric domains, allowing for multiple stable states even at scaled-down dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional ferroelectric materials are used, then binary switching is achieved, but scalability and multi-state memory capability are limited

Engineering Contradiction:
Improvememory statesVSAvoidgrain size control
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent changes the chemical composition parameters of the ferroelectric material by introducing interstitial dopants (H, N, C, B, or F) at controlled concentrations (≤10 at%). This parameter change enables the material to exhibit multiple stable polarization states while maintaining manufacturability through standard doping processes, resolving the contradiction between versatility and complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite ferroelectric material system by combining host ferroelectric materials (HfO2, ZrO2, Hf1-xZrxO2) with interstitial dopants. This composite structure enables multi-state memory capability while the dopants remain within standard processing ranges, achieving both enhanced versatility and controlled complexity

Inventive Principle:
Principle #40Composite materials

2Quantity of substance

If ferroelectric layer dimension is reduced for scaling, then higher density is achieved, but maintaining multiple stable polarization states becomes difficult

Engineering Contradiction:
Improvememory densityVSAvoidpolarization state stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent modifies the material parameters by incorporating interstitial dopants that stabilize multiple polarization states at reduced dimensions. The dopant concentration is controlled to ≤10 at% to maintain reliability while enabling scaling to dimensions of 300 nm or less, achieving both high density and stable polarization

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The interstitial dopants are distributed locally within the ferroelectric lattice to create regions with enhanced polarization stability. This local quality enhancement allows the material to maintain multiple stable states even at scaled-down dimensions, resolving the contradiction between density and reliability

Inventive Principle:
Principle #3Local quality

3Reliability

If interstitial dopant concentration is increased, then remnant polarization and thermal stability are enhanced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveremnant polarizationVSAvoiddopant concentration control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent optimizes the dopant concentration parameter to ≤10 at%, which is sufficiently high to enhance remnant polarization and thermal stability but low enough to remain compatible with standard manufacturing precision. This parameter selection resolves the contradiction by finding the optimal point where performance improvement does not require excessive manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in higher endurance and thermal stability, enabling the implementation of high-density memory applications with multiple memory states by promoting the formation of polycrystal orthorhombic phases and reducing non-ferroelectric domains, thus overcoming the limitations of conventional devices.

Implementation Method 1

enhancing the formation of the orthorhombic phase

Methodology Applied
Scientific EffectPhase formation enhancement:

Implementation Method 2

reducing grain sizes

Methodology Applied
Scientific EffectGrain size reduction:

Implementation Method 3

materials that exhibit a spontaneous electric polarization that can be reversed in direction by the application of a suitable electric field

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 4

The ferroelectric materials may remain polarized even when the electric field is removed

Methodology Applied
Scientific EffectSpontaneous polarization:

Data Source

PatentUS20230402496A1Ferroelectric non-volatile memory devices
Publication Date: 2023.12.14 TETRAMEM INC
  • US20230402496A1 patent drawing
  • US20230402496A1 patent drawing
  • US20230402496A1 patent drawing

AI summary

In accordance with some embodiments of the present disclosure, a memory device is provided. The memory may include a ferroelectric layer including a ferroelectric material interstitially doped with at least one interstitial dopant. The ferroelectric material may include a metal oxide. The interstitial dopant may include an element having an atomic radius that is not greater than an atomic radius of a metal element of the metal oxide. In some embodiments, the metal oxide comprises at least one of hafnium or zirconium. The memory device may be non-volatile. The memory device may be a ferroelectric capacitor (FeCAP), a ferroelectric field-effect transistor (FeFET), a ferroelectric tunneling junction (FTJ), and/or another form of ferroelectric random-access memory (Fe-RAM).