Solid-State Devices TRIZ Cases

Phase-shaped infrared condensing regions and optical filters improve IR signal use while reducing crosstalk in mixed visible-IR image sensors.

Alternating metal and metal nitride plate sublayers cut MIM capacitor series resistance and time constant while preserving oxidation protection.

A fluorine-containing oxidizing treatment stabilizes Mn4+ fluoride phosphors against heat and humidity while preserving red emission efficiency.

Oblique fluid contact and off-center chuck rotation reduce bubbles, non-specific binding, and substrate breakage in microLED self-assembly.

Light-transmitting and blocking regions let fingerprint sensing move into the display area while improving planarity and reducing etching risk.

Metal etch channels fully remove sacrificial layers to form suspended silicon photonic structures with lower residue and better optical confinement.

Staggered semiconductor detectors and a tuned collimator improve radiation image resolution while easing heat limits in large-area arrays.

Thermal oxidation creates a graded TiN-to-dielectric interface that relieves stress, improves adhesion, and suppresses wafer bending.

Wider, higher-pitch edge trench capacitor segments absorb thermal stress, reduce substrate bending and trench burnout, and improve yield.

An internal gate deepens a local potential well near the transfer transistor to raise saturation charge and preserve dynamic range in global shutter pixels.

Color and transmittance contrast between display base layers reveals etching completion in real time, helping expose pad layers and improve yield.

A stepped interlayer insulating layer improves display transmittance by exposing substrate areas while limiting impurities and yield loss.

Selective regrowth on ELO-grown μLED mesas cuts surface recombination losses and supports low-damage transfer to display panels.

A top-side color coating on solar module ribbons cuts shading and soiling while preserving bottom-side conductivity and cell bonding.

Source-drain coupling in one transistor lets 2T memory cells pack more densely while lowering standby power and extending low-temperature retention.

A heat dissipation layer overlapping the protection circuit improves cooling and protection characteristics without increasing chip area.

Different component concentrations in gate insulating film portions remove interface traps, improving bidirectional degradation and afterimage resistance.

A 2x2 mirror-patterned SRAM layout shares contact plugs to shrink cell area while improving exposure quality and fabrication yield.

A switchable electrode-to-power-line link drives high current to ablate OLED shorting impurities and repair dark spots without harming nearby pixels.

Adhesive patterns both transfer and bond semiconductor light emitters to wiring electrodes, cutting transfer steps, damage, and cost.

Adjusting a circuit-carrier resistor after LED property detection balances top-mount automotive light sources without stocking multiple resistor types.

Dielectric walls replace gate cuts in SRAM bit cells, enabling tighter channel-track spacing, smaller cell area, and higher circuit density.

Conductive polymer contact electrodes anchor light emitting elements and improve coupling while cutting display fabrication steps.

Bidirectional DTSCR and diode paths protect thin MOS oxide during CDM events, preserving input circuit operation in advanced chip processes.

Overlapping pad placement in a multilayer micro LED matrix cuts pad count, improves surface flatness, and raises bonding yield.

By routing circuit layers and pads through an asymmetric through hole, this display panel layout cuts non-display area and improves visual quality.

Gate-voltage pixel driving compensates TFT and LED variation to reduce mura, image sticking, and luminance degradation.

Overlapping OLED light-emitting layers with a charge generation layer produce secondary colors while reducing mask count, power use, and alignment issues.

A CMOS pixel circuit binarizes photoelectric signals in hardware, speeding image processing while maintaining sensitivity and low power.

A tapered fence pattern between color filters reduces pixel crosstalk while preserving incident light and structural stability.

A second capacitor and transistor amplify FTJ leakage-current readout, widening the read window for faster, more reliable nonvolatile memory.

High- and low-sensitivity pixels with independent outputs capture bright and dim scenes in one exposure, improving dynamic range and recognition.

Two source branch portions confine the drain and connection hole to prevent drain-data line shorts, reducing bright spots and vertical line defects.

Oxide-filled sub-DTI refraction structures guide oblique light into the photodiode, boosting quantum efficiency and reducing crosstalk.

Infrared biometric imaging captures vein and physical features for convenient authentication while securely recording each unlock event.

Interstitial dopants in HfO2 or ZrO2 ferroelectrics promote orthorhombic phases and smaller grains, enabling stable multi-state non-volatile memory.

Reflective and isolation structures suppress pixel crosstalk in semiconductor image sensors, improving light absorption in low-light conditions.

Bent backside word lines in 3D memory ease interconnect routing, raise cell density, and reduce chip area and interface resistance.

A hydrocarbon-group polymer layer improves nano-carbon coating uniformity, reducing pixel brightness variation in vertical organic light-emitting transistors.

Alternating doped and undoped chalcogenide layers confine heat in PCM cells, cutting programming current, energy use, and switching time.

Trench dielectric spacers isolate diode pixels while exposing sidewall contacts, reducing crosstalk without sacrificing electrical response.

An ionic-liquid-assisted FAPbI3 process controls crystallization to suppress delta-phase formation and produce dense, stable alpha-phase films.

An optical pattern beside adjacent emitters under a shared lens absorbs light to reduce mura and improve display uniformity.

A crystalline CrNi or CrNiFe seed layer blocks electrode diffusion and improves MTJ fcc (111) texture for higher tunnel magnetoresistance.

Separators and a CTE-matched metal substrate enable wafer-level LED packaging before dicing, cutting handling time and thermal delamination.

Common ground routing for column sample-and-hold units cuts noise and potential fluctuation, improving photoelectric signal conversion accuracy.

A split photodiode and partial low-κ trench dielectric steer photoelectrons along the transfer gate to limit lag, dark current, and image artifacts.

A multilayer insulating stack manages hydrogen diffusion to cut noise and dark current while protecting metal wiring from oxidation.

Multiple TFT subchannels stabilize channel width at prism connections, reducing voltage-dividing shifts and uneven sub-pixel brightness.

A narrow grid over pixel isolation reflects oblique light back into pixel regions, improving image sensor sensitivity and signal-to-noise ratio.