Solid-State Devices TRIZ Cases

Phase-shaped infrared condensing regions and optical filters improve IR signal use while reducing crosstalk in mixed visible-IR image sensors.

Alternating metal and metal nitride plate sublayers cut MIM capacitor series resistance and time constant while preserving oxidation protection.

A fluorine-containing oxidizing treatment stabilizes Mn4+ fluoride phosphors against heat and humidity while preserving red emission efficiency.

Oblique fluid contact and off-center chuck rotation reduce bubbles, non-specific binding, and substrate breakage in microLED self-assembly.

Light-transmitting and blocking regions let fingerprint sensing move into the display area while improving planarity and reducing etching risk.

Metal etch channels fully remove sacrificial layers to form suspended silicon photonic structures with lower residue and better optical confinement.

Staggered semiconductor detectors and a tuned collimator improve radiation image resolution while easing heat limits in large-area arrays.

Thermal oxidation creates a graded TiN-to-dielectric interface that relieves stress, improves adhesion, and suppresses wafer bending.

Wider, higher-pitch edge trench capacitor segments absorb thermal stress, reduce substrate bending and trench burnout, and improve yield.

An internal gate deepens a local potential well near the transfer transistor to raise saturation charge and preserve dynamic range in global shutter pixels.

Color and transmittance contrast between display base layers reveals etching completion in real time, helping expose pad layers and improve yield.

A stepped interlayer insulating layer improves display transmittance by exposing substrate areas while limiting impurities and yield loss.

Selective regrowth on ELO-grown μLED mesas cuts surface recombination losses and supports low-damage transfer to display panels.

A top-side color coating on solar module ribbons cuts shading and soiling while preserving bottom-side conductivity and cell bonding.

Source-drain coupling in one transistor lets 2T memory cells pack more densely while lowering standby power and extending low-temperature retention.

A heat dissipation layer overlapping the protection circuit improves cooling and protection characteristics without increasing chip area.

Different component concentrations in gate insulating film portions remove interface traps, improving bidirectional degradation and afterimage resistance.

A 2x2 mirror-patterned SRAM layout shares contact plugs to shrink cell area while improving exposure quality and fabrication yield.

A switchable electrode-to-power-line link drives high current to ablate OLED shorting impurities and repair dark spots without harming nearby pixels.

Adhesive patterns both transfer and bond semiconductor light emitters to wiring electrodes, cutting transfer steps, damage, and cost.

Adjusting a circuit-carrier resistor after LED property detection balances top-mount automotive light sources without stocking multiple resistor types.

Dielectric walls replace gate cuts in SRAM bit cells, enabling tighter channel-track spacing, smaller cell area, and higher circuit density.

Conductive polymer contact electrodes anchor light emitting elements and improve coupling while cutting display fabrication steps.

Bidirectional DTSCR and diode paths protect thin MOS oxide during CDM events, preserving input circuit operation in advanced chip processes.

Overlapping pad placement in a multilayer micro LED matrix cuts pad count, improves surface flatness, and raises bonding yield.

By routing circuit layers and pads through an asymmetric through hole, this display panel layout cuts non-display area and improves visual quality.

Gate-voltage pixel driving compensates TFT and LED variation to reduce mura, image sticking, and luminance degradation.

Overlapping OLED light-emitting layers with a charge generation layer produce secondary colors while reducing mask count, power use, and alignment issues.

A CMOS pixel circuit binarizes photoelectric signals in hardware, speeding image processing while maintaining sensitivity and low power.

A tapered fence pattern between color filters reduces pixel crosstalk while preserving incident light and structural stability.

A second capacitor and transistor amplify FTJ leakage-current readout, widening the read window for faster, more reliable nonvolatile memory.

High- and low-sensitivity pixels with independent outputs capture bright and dim scenes in one exposure, improving dynamic range and recognition.

Two source branch portions confine the drain and connection hole to prevent drain-data line shorts, reducing bright spots and vertical line defects.

Oxide-filled sub-DTI refraction structures guide oblique light into the photodiode, boosting quantum efficiency and reducing crosstalk.

Infrared biometric imaging captures vein and physical features for convenient authentication while securely recording each unlock event.

Interstitial dopants in HfO2 or ZrO2 ferroelectrics promote orthorhombic phases and smaller grains, enabling stable multi-state non-volatile memory.

Reflective and isolation structures suppress pixel crosstalk in semiconductor image sensors, improving light absorption in low-light conditions.

Bent backside word lines in 3D memory ease interconnect routing, raise cell density, and reduce chip area and interface resistance.

A hydrocarbon-group polymer layer improves nano-carbon coating uniformity, reducing pixel brightness variation in vertical organic light-emitting transistors.

Alternating doped and undoped chalcogenide layers confine heat in PCM cells, cutting programming current, energy use, and switching time.

Trench dielectric spacers isolate diode pixels while exposing sidewall contacts, reducing crosstalk without sacrificing electrical response.

An ionic-liquid-assisted FAPbI3 process controls crystallization to suppress delta-phase formation and produce dense, stable alpha-phase films.

An optical pattern beside adjacent emitters under a shared lens absorbs light to reduce mura and improve display uniformity.

A crystalline CrNi or CrNiFe seed layer blocks electrode diffusion and improves MTJ fcc (111) texture for higher tunnel magnetoresistance.

Separators and a CTE-matched metal substrate enable wafer-level LED packaging before dicing, cutting handling time and thermal delamination.

Common ground routing for column sample-and-hold units cuts noise and potential fluctuation, improving photoelectric signal conversion accuracy.

A split photodiode and partial low-κ trench dielectric steer photoelectrons along the transfer gate to limit lag, dark current, and image artifacts.

A multilayer insulating stack manages hydrogen diffusion to cut noise and dark current while protecting metal wiring from oxidation.

Multiple TFT subchannels stabilize channel width at prism connections, reducing voltage-dividing shifts and uneven sub-pixel brightness.

A narrow grid over pixel isolation reflects oblique light back into pixel regions, improving image sensor sensitivity and signal-to-noise ratio.

Stacked SPAD sensor device uses insulation regions between pixel and logic layers to prevent electrical shorting during manufacturing.

Atomic layer deposition creates oxide-nitride-oxide sidewalls to protect floating gate stacks in non-volatile memory cells.

Segmenting common voltage lines reduces self-resistance to eliminate flickers and residual images in liquid crystal displays.

Deforming an auxiliary cathode ruptures the organic layer to create a connection channel, reducing voltage drop and improving brightness uniformity.

Segmented common electrode patterns with insulating gaps isolate conductive seal balls from gate lines in liquid crystal displays.

Dielectric elastomer units on a flexible display panel reversibly deform under voltage to provide adjustable stiffness.

Segmented OLED electrodes with high aspect ratio connectors limit leakage current, preventing short-circuit defects without increasing organic layer thickness.

A semiconductor gate dielectric structure incorporating graded interface layers to control nitrogen concentration profiles.

Stacked light-emitting elements with connection electrodes improve internal quantum efficiency without increasing fabrication complexity.

Dual photodiodes in a semiconductor substrate isolate ultraviolet signals via differential attenuation.

Segmenting face-up OLED and flip QLED sub-pixels resolves energy level mismatches to enhance efficiency and service life.

Dispirofluorene derivatives enhance device lifetime and efficiency by providing high thermal stability during vacuum deposition.

Segmenting the phase-change layer into a core and shell allows independent resistance control, resolving reliability issues from precise pulse requirements.

An anti-reflection layer blocks light reflection from underlying metal patterns, ensuring uniform thin film resistor profiles and stable resistance values.

Backside and frontside reflectors increase the effective silicon thickness in image sensor pixels to enhance near-infrared light absorption.

Segmenting the encapsulation into alternating inorganic and organic layers reduces film stress and peeling risks while blocking moisture penetration.

An LED design employs a patterned insulation layer to prevent current crowding and reduce light absorption by the interconnection.

Replacing MOSFETs with a semiconductor-based selector in ReRAM cells reduces device size and improves operational reliability.

Graded exciton localization energy in the p-side well layers suppresses non-radiative recombination, improving internal quantum efficiency and luminous output.

Extracts invalid patterns from shallow ion implanting layers to reduce hot spots and simplify optical proximity correction processing.

A CMOS image sensor distributes column read-out circuitry within the active pixel matrix to optimize device area utilization.

A wafer-level black coating process applies material to stretched camera cubes and uses laser trimming to define precise patterns.

Segmented reflective structure redirects oblique light back to pixel conversion portions, reducing signal crosstalk between adjacent pixels.

Stacked conductive dummy patterns dissipate heat during tiled display cutting, preventing element damage without extra mask steps.

Reconfiguring edge cells from square to rectangular shapes mitigates pattern density gradients, reducing area overhead from dummy devices.

Adhesion-selective substrate layers guide vertical organic field effect transistor electrode deposition for precise structural formation.

A vertical storage capacitor structure increases capacitance without occupying planar area on a thin film transistor array substrate.

Stress relief cuts increase curvature radius to prevent cracking, enabling spherical imaging arrays.

Silicon glass releases n-type dopants through thermal diffusion to achieve uniform doping concentration along the vertical direction of active pillars.

Deep insulating trenches penetrate the substrate to isolate pixels, suppressing cross-talk and ensuring accurate image signal reproduction.

Reducing QWP in-plane retardation below 140 nm prevents blue color shifts caused by lower TAC layer interference, enhancing reflective visibility.

Merging touch and data lines into a single metal layer reduces mask processes while maintaining electrical connectivity via bridging connections.

Nesting storage capacitors within electrode projections reduces light blocking and leakage, enhancing fingerprint recognition accuracy.

A four-terminal switch circuit uses serial variable-resistance and rectifier elements to enable high-speed switching operations.

Multiplexer merges device outputs into shared lines to reduce contact pad count while maintaining measurement precision through rapid periodic switching.

A Hall effect sensor detects changes in the magnetic field of a permanent magnet to quantify ferrous debris, eliminating the need for mechanical inspection.

Light blocking solution layer prevents external reflection from electrodes, enhancing reliability of transparent display devices.

A quasi-volatile memory module integrates three-dimensional NOR arrays with a controller circuit for efficient data handling.

Extension last NFET implants and faceted epitaxial silicon raised source/drain regions reduce series resistance while maintaining low leakage currents.

Segmented circuit film with passivation layer distributes mechanical stress to prevent detachment and cracking during repeated folding.

Composite resin film with carbonate and ester bonds delivers positive refractive index anisotropy.

A buried n-doped region collects diffusing electrons to reduce crosstalk, improving modulation transfer function and color accuracy.

A tapered upper end on a cylindrical storage node prevents leaning and bridging between adjacent nodes.

A crack-stopping groove isolates the drive circuit layer between active and fan-out areas to block crack propagation.

Protrusions on patterned organic planarization layers eliminate metal etch residue at steps, preventing shorts between signal lines.

Merging charge storage and control gate layers into one polysilicon structure reduces manufacturing complexity and improves yield for nonvolatile memory cells.