Image Sensor Pixel Trench Dielectric for Electron Lag Control
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Solution Overview
Problem
Pixels with vertical transfer gates face issues with electron transport lag and dark current, leading to image artifacts such as black dots and bright spots in captured images.
Innovation Solution
A pixel design featuring a semiconductor substrate with a trench and a low-κ dielectric layer between the trench depth and a low-κ depth, where the photodiode region is split into a bottom and top section, and a dielectric layer is deposited between the planar region and the low-κ depth, inhibiting current flow and preventing trapped electrons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertical transfer gates are used to increase pixel density, then pixel density is improved, but electron transport lag and dark current increase causing image artifacts
Solution Approach 1:
The photodiode region is divided into a first photodiode section and a second photodiode section separated by the trench. This segmentation prevents photoelectrons generated in the first section from being trapped at the trench bottom, while the second section maintains proximity to the transfer gate for efficient charge transfer, thus resolving the contradiction between high pixel density and reduced electron transport lag.
Solution Approach 2:
The low-κ dielectric material is introduced as an intermediary substance filling the trench to reduce capacitance between the photodiode sections and transfer gate. This intermediary structure prevents harmful electrostatic interactions that cause electron transport lag and dark current, while maintaining the vertical configuration needed for high pixel density.
2Productivity
If photodiode and floating diffusion region are laterally displaced with transfer gate therebetween, then pixel density is limited, but electron transport path is simplified
Solution Approach 1:
The patent transitions from lateral displacement of photodiode and floating diffusion regions to vertical arrangement with the trench structure. By introducing the vertical dimension with the trench separating photodiode sections, the design achieves higher pixel density through vertical transfer gates while managing electron transport through the segmented vertical architecture rather than lateral routing.
3Object-generated harmful factors
If trench is fully filled with low-κ dielectric to trench depth, then electron trapping is prevented, but manufacturing complexity increases
Solution Approach 1:
The low-κ dielectric is selectively placed only in the portion of the trench between the first photodiode section and the transfer gate, rather than filling the entire trench depth. This local application provides the necessary capacitance reduction and electron trapping prevention in the critical region while simplifying manufacturing compared to full trench filling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces image artifacts by ensuring photoelectrons flow through the conduction channel formed on the sidewalls of the vertical transfer gate, preventing them from being trapped at the bottom of the trench, thus enhancing image quality.
Implementation Method 1
low-κ dielectric is in the trench between the trench depth and a low-κ depth
Implementation Method 2
Light reaching the photodiode region generates photoelectrons
Implementation Method 3
The transfer gate controls current flow from the photodiode region to the floating diffusion region and may include a field-effect transistor
Data Source
AI summary
A pixel includes a semiconductor substrate, a low-κ dielectric, and a photodiode region in the semiconductor substrate. The semiconductor substrate has a substrate top surface that forms a trench. The trench extends into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The low-κ dielectric is in the trench between the trench depth and a low-κ depth with respect to the planar region. The low-κ depth is less than the trench depth. The photodiode region is in the semiconductor substrate and includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench. The top photodiode section begins at a photodiode depth, with respect to the planar region, that is less than the low-κ depth, and extends toward and adjoining the bottom photodiode section.