PMOS Replacement Metal Gate with Raised Source Drain
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Solution Overview
Problem
Current CMOS technology faces limitations in PMOS device performance due to polysilicon depletion and tensile strain, which degrades hole mobility in deep sub-micron transistors.
Innovation Solution
The implementation of a replacement metal gate process for PMOS transistors, involving the growth of epitaxial silicon germanium source drains and the use of a high-k gate dielectric with a p-type metal layer to relieve tensile strain and improve mobility, along with the removal of the nitride etch stop layer to reduce external resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If polysilicon gate is used in PMOS devices, then device structure is simple, but polysilicon depletion occurs and hole mobility degrades
Solution Approach 1:
The patent changes the material parameter of the gate from polysilicon to metal (such as tungsten, titanium nitride, or other metal gates), fundamentally altering the electrical and mechanical properties of the gate structure. This material substitution eliminates polysilicon depletion effects and enables compressive stress application to improve hole mobility in PMOS devices.
Solution Approach 2:
The patent employs composite material structures including metal gate electrodes combined with high-k dielectric materials (such as hafnium oxide, silicon oxide, or silicon nitride). This composite approach provides both the electrical benefits of metal gates and the insulating properties of high-k dielectrics, while enabling stress engineering through the nitride etch stop layer with tensile stress characteristics.
2Ease of manufacture
If tensile strain is applied to PMOS channel, then manufacturing process is simplified, but hole mobility is degraded
Solution Approach 1:
The patent applies compressive stress to the PMOS channel through the metal gate structure and associated stressor layers, which is the opposite (anti-action) of the conventional tensile strain approach. This preliminary application of compressive stress counteracts the natural tensile strain that would otherwise degrade hole mobility, thereby improving device performance while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances PMOS device performance by reducing polysilicon depletion and tensile strain, thereby improving hole mobility and reducing external resistance, while maintaining NMOS transistor functionality.
Implementation Method 1
compressive stress in the channel of the PMOS transistors
Implementation Method 2
tensile strain may arise in the PMOS devices
Implementation Method 3
polysilicon depletion may occur in the PMOS devices
Implementation Method 4
the growth of epitaxial silicon germanium source drains
Data Source
AI summary
A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed of epitaxially deposited silicon germanium material that is doped p-type. The replacement metal gate process results in a metal gate electrode and may involve the-removal of a nitride etch stop layer.