Vertical Organic FET Adhesion-Selective Layer Leakage Current

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Solution Overview

Problem

The existing methods for producing vertical organic field effect transistors are complex and result in undesirable leakage currents due to the non-selective deposition of organic semiconductor layers, leading to inefficient structuring and potential short circuits.

Innovation Solution

A method involving an adhesion-selective layer on the substrate that allows transistor electrodes and insulating layers to adhere while preventing the organic semiconductor material from adhering outside the intended structure, using materials like CYTOP and plasma etching to ensure precise layer formation and avoid dead areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition methods are used for organic semiconductor layers, then the layers can be formed on the transistor electrodes, but the organic semiconductor material deposits non-selectively outside the intended structure, causing leakage currents and requiring complex structuring steps

Engineering Contradiction:
Improvestructuring precision of organic semiconductor layerVSAvoidcomplexity of production process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating an adhesion-selective layer with spatially varying properties: areas with high adhesion for electrodes/insulators and areas with low adhesion for organic semiconductor material. This allows selective deposition in different regions of the substrate, achieving precise structuring of the organic semiconductor layer only where intended, while preventing deposition in other areas without requiring complex structuring steps.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The adhesion-selective layer is deposited beforehand on the substrate before forming the transistor electrodes and insulating layers. This preliminary action establishes the adhesion properties in advance, so that when organic semiconductor material is deposited later, it automatically adheres only in the intended areas without requiring additional structuring steps, thereby simplifying the overall production process.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the organic semiconductor layer is deposited to cover the entire substrate, then complete coverage is achieved, but leakage currents occur due to material deposition outside the transistor structure

Engineering Contradiction:
Improveleakage current reductionVSAvoidsimplicity of layer deposition
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The adhesion-selective layer creates local differences in adhesion properties across the substrate surface. Areas where transistor electrodes and insulating layers are present have high adhesion, while areas outside the transistor structure have low adhesion. This allows the organic semiconductor material to be deposited uniformly across the substrate while automatically adhering only in the intended transistor areas, eliminating leakage currents without requiring complex deposition masking techniques.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If plasma etching is applied to structure the organic semiconductor layer, then precise patterning is achieved, but the adhesion-selective layer may lose its non-adhesive property

Engineering Contradiction:
Improvepatterning precision of organic semiconductor layerVSAvoidstability of adhesion-selective layer
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The adhesion-selective layer is segmented into functionally distinct regions: areas with high adhesion for electrodes and insulators, and areas with low adhesion for preventing organic semiconductor deposition. This segmentation allows the low-adhesion areas to serve as permanent masks during plasma etching, protecting the adhesion-selective layer's non-adhesive property while enabling precise patterning of the organic semiconductor layer through selective removal in high-adhesion areas.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the structuring of the organic semiconductor layer, reduces leakage currents, and maintains the non-adhesive property even after plasma application, resulting in a more efficient and reliable vertical organic field effect transistor.

Implementation Method 1

WO 02/29912 A1 discloses a vertical organic field effect transistor and a hydrophobic surface to selectively deposit the gate electrode only in a selected area. Further details on the hydrophobic surface were reported in N. Stutzmann et al, Science 2003, 299, 1881-1884.

Methodology Applied
Scientific EffectHydrophobic surface: Hydrophobe

Implementation Method 2

A plasma application can also detect a surface of the non-stick layer outside the partial layer structure. In this embodiment, the anti-adhesion property of the adhesion-selective layer with respect to the organic semiconductor material is retained even after plasma application.

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

the layer provides an adhesive base for the transistor electrodes and at least one of the electrically insulating layers, so that these materials adhere to the adhesion-selective layer when deposited

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentEP3200253B1Method for producing a vertical organic field effect transistor and vertical organic field effect transistor
Publication Date: 2021.06.30 NOVALED GMBH
  • EP3200253B1 patent drawingFigure 1
  • EP3200253B1 patent drawingFigure 2~3
  • EP3200253B1 patent drawingFigure 4

AI summary

The invention relates to a method for producing a vertical organic field-effect transistor (VEF) in which a vertical VEF with a layer arrangement is produced on a substrate. The VEF comprises transistor electrodes, namely a first electrode (23; 24), a second electrode (23; 24), and a third electrode (32), electrically insulating layers (25; 34), and an organic semiconductor layer (28). Furthermore, a vertical VEF is created which has a layer arrangement with transistor electrodes on a substrate (21). (Fig. 4)