Vertical Storage Capacitor for OLED Aperture Ratio

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Solution Overview

Problem

Conventional TFT array substrates face challenges in maximizing storage capacitor capacity and aperture ratio due to the typical parallel formation of storage capacitors, which reduces the region available for TFTs and can block light in rear emission displays.

Innovation Solution

The TFT array substrate features a storage capacitor formed perpendicular to the substrate with electrodes on the edges, allowing for increased capacity and reduced light blocking, along with a connector connecting the first and drain electrodes through a contact hole, and an additional storage insulating layer for enhanced insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If storage capacitor is formed in parallel to substrate, then manufacturing process is simple, but storage capacitor capacity is reduced and light blocking occurs

Engineering Contradiction:
Improvestorage capacitor formation processVSAvoidstorage capacitor capacity
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The storage capacitor is reconfigured from a planar structure (parallel to substrate) to a vertical structure (perpendicular to substrate). The first electrode extends vertically through the buffer layer, and the second electrode is positioned above it, creating a three-dimensional capacitor structure that increases capacitance without occupying additional planar area, thus resolving the contradiction between manufacturing simplicity and capacitor capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If storage capacitor is formed in parallel to substrate, then manufacturing process is simple, but aperture ratio is reduced due to light blocking

Engineering Contradiction:
Improvestorage capacitor formation processVSAvoidaperture ratio
Core Design Contradiction:
Ease of manufactureVSIllumination intensity

Solution Approach 1:

By transitioning the storage capacitor from a horizontal planar configuration to a vertical configuration, the capacitor structure no longer blocks light paths in the display region. The vertical electrodes extend through the buffer layer perpendicular to the substrate, allowing light to pass through the aperture without obstruction, thereby improving aperture ratio while maintaining manufacturing simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If storage capacitor uses vertical electrode configuration, then storage capacitor capacity and aperture ratio are improved, but device complexity increases

Engineering Contradiction:
Improvestorage capacitor capacityVSAvoidstorage capacitor structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The vertical electrode structure of the storage capacitor is merged with the existing TFT vertical structures (source and drain electrodes extending vertically). The first electrode of the storage capacitor shares the same vertical buffer layer region as the TFT active layer, and the connector that connects the first electrode to the drain electrode integrates multiple functions into a single structural element, thereby reducing overall device complexity despite the vertical configuration.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9761649B2Thin film transistor array substrate, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same
Publication Date: 2017.09.12 SAMSUNG DISPLAY CO LTD
  • US9761649B2 patent drawing
  • US9761649B2 patent drawing
  • US9761649B2 patent drawing

AI summary

A thin film transistor (TFT) array substrate is disclosed. In one aspect, the substrate includes a buffer layer formed over a substrate, a storage capacitor formed in the buffer layer and including a first electrode and a second electrode surrounding and insulated from the first electrode and a driving TFT formed over the buffer layer.