Dual Voltage Select Gate Structure for NAND Memory Program Disturb

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Solution Overview

Problem

Non-volatile memory devices face program disturb issues due to capacitive coupling between storage elements, particularly in NAND technology, where shifts in threshold voltage occur during programming, leading to read errors and widened voltage distributions as the spacing between elements decreases with scaling.

Innovation Solution

Implementing a dual voltage select gate structure with a select gate and coupling electrode, where the select gate and coupling electrode are independently driven with first and second voltages, respectively, based on programming criteria such as word line position, temperature, and programming cycles, to reduce program disturb and improve programming efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the spacing between storage elements is decreased to increase storage density, then storage capacity is improved, but program disturb increases due to capacitive coupling

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram disturb
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

A coupling electrode is introduced as an intermediary structure between the select gate and the storage elements. This coupling electrode acts as a mediator to control the electric field distribution, reducing capacitive coupling effects between adjacent storage elements while maintaining the benefits of reduced spacing for increased storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different voltages to different parts of the select gate structure (dual voltage approach). By independently controlling the voltage on the coupling electrode versus the main select gate, the electric field parameters are optimized to reduce program disturb during programming operations while maintaining element selection capability.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If a single voltage is applied to the select gate, then the structure is simple, but program disturb cannot be effectively reduced

Engineering Contradiction:
Improveselect gate structureVSAvoidprogram disturb
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The select gate structure is segmented into two independently controllable parts: the main select gate and the coupling electrode. This segmentation allows each part to be optimized for different functions - the main select gate for element selection and the coupling electrode for field control - thereby effectively reducing program disturb through differentiated voltage application.

Inventive Principle:
Principle #1Segmentation

3Speed

If high programming voltage is applied to program storage elements, then programming speed is improved, but threshold voltage control accuracy deteriorates

Engineering Contradiction:
Improveprogramming speedVSAvoidthreshold voltage control accuracy
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent employs dynamic voltage parameter changes during the programming process. By adjusting the voltages on the select gate and coupling electrode at different stages of programming, the system achieves both fast programming speeds and accurate threshold voltage control, avoiding the trade-off between speed and precision.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dual voltage select gate structure effectively mitigates program disturb by controlling the voltage applied to the coupling electrode, reducing the maximum programming voltage needed and enhancing the accuracy of threshold voltage control, thereby improving data retention and read accuracy in multi-state flash memory devices.

Implementation Method 1

program disturb issues due to capacitive coupling between storage elements

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

The threshold voltage (VTH) of the transistor thus formed is controlled by the amount of charge that is retained on the floating gate

Methodology Applied
Scientific EffectCharge storage: Capacitance

Data Source

PatentUS7616490B2Programming non-volatile memory with dual voltage select gate structure
Publication Date: 2009.11.10 SANDISK TECHNOLOGIES LLC
  • US7616490B2 patent drawing
  • US7616490B2 patent drawing
  • US7616490B2 patent drawing

AI summary

A select gate structure for a non-volatile storage system includes a select gate and a coupling electrode which are independently drivable. The coupling electrode is adjacent to a word line in a NAND string and has a voltage applied which reduces gate induced drain lowering (GIDL) program disturb of an adjacent unselected non-volatile storage element. In particular, an elevated voltage can be applied to the coupling electrode when the adjacent word line is used for programming. A reduced voltage is applied when a non-adjacent word line is used for programming. The voltage can also be set based on other programming criterion. The select gate is provided by a first conductive region while the coupling electrode is provided by a second conductive region formed over, and isolated from, the first conductive region.