Doped Semiconductor Substrate and Seed Islands for Optoelectronic Devices
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Solution Overview
Problem
Existing optoelectronic devices comprising microwires or nanowires face challenges in current flow and crystallographic control, particularly due to insulating seed layers that hinder electron tunneling and dopant diffusion, affecting the quality and efficiency of semiconductor materials.
Innovation Solution
The implementation of doped semiconductor substrates and seed islands with opposite conductivity types, connected to a bias source, to enhance current flow and crystallographic control, allowing for the growth of single-crystal semiconductor wires with precise geometry and crystallographic properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If insulating seed layers are used to grow semiconductor wires, then crystallographic control is improved, but current flow is hindered due to electron tunneling barriers
Solution Approach 1:
The patent changes the electrical parameter of the seed layer by introducing doping to create opposite conductivity types. The substrate is doped with first conductivity type (e.g., n-type) and the seed layer is doped with second conductivity type (e.g., p-type), transforming the insulating seed layer into a doped semiconductor layer that allows current flow while maintaining crystallographic control during wire growth.
2Reliability
If heavily doped substrates are used to improve current flow, then electrical conductivity is improved, but dopant diffusion to seed layers increases affecting material quality
Solution Approach 1:
The patent applies local quality by creating spatially differentiated doping concentrations. The substrate has a first dopant concentration optimized for conductivity, while the seed layer has a second dopant concentration that prevents excessive diffusion. This local differentiation allows the substrate to provide good electrical conductivity while the seed layer maintains control over dopant diffusion to preserve material quality.
3Reliability
If opposite conductivity types are used in substrate and seed layer, then current flow through seed islands is improved, but device complexity increases
Solution Approach 1:
The patent uses parameter changes by modifying the electrical conductivity parameter of the seed layer through doping with opposite conductivity type. This transforms the seed layer from an insulating barrier into an active electrical component that facilitates current flow, resolving the contradiction between maintaining crystallographic control and enabling electrical conduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves current flow through seed islands, enables uniform control of three-dimensional semiconductor elements, and facilitates the formation of high-quality optoelectronic devices at an industrial scale with improved efficiency and cost-effectiveness.
Implementation Method 1
insulating seed layers that hinder electron tunneling
Implementation Method 2
dopant diffusion, affecting the quality and efficiency of semiconductor materials
Implementation Method 3
connected to a bias source, to enhance current flow and crystallographic control
Implementation Method 4
light-emitting semiconductor portions, each portion at least partially covering one of the semiconductor elements
Data Source
AI summary
The invention relates to an optoelectronic device (50) including: a semiconductor substrate (14) doped with a first conductivity type; semiconductor contact pads (54) or a semiconductor layer, in contact with a surface of the substrate, doped with a second conductivity type opposite to the first type; conical or frusto-conical wired semiconductor elements (26), doped with the first conductivity type, each element being in contact with one of the contact pads or with the layer; light-emitting semiconductor portions (30), each portion at least partially covering one of the semiconductor elements; and a circuit (S) for polarizing the contact pads (54) or the layer. The contact pads or the layer are selected among: aluminum nitride, boron nitride, silicon carbide, magnesium nitride, gallium and magnesium nitride, or a combination of same and the nitride compounds thereof.


