Double-Gated FinFET Structure for High-Density Transistor Selection
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Solution Overview
Problem
The construction and operation of high aspect ratio finFETs are challenging due to the difficulty in forming and controlling gates and transistors with reduced dimensions and spacing, which affects transistor density and manufacturing costs.
Innovation Solution
The formation of high aspect ratio finFETs with double gates, where a highly resistive upper gate and a low resistive lower gate are used, allowing the lower gates to preselect fins during biasing of the upper gates, facilitating improved selection and operation of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high aspect ratio fins are constructed with small dimensions and tight spacing to increase transistor density, then transistor density is improved, but the difficulty of forming and controlling gates increases
Solution Approach 1:
The gate structure is segmented into multiple independent gates (first gate and second gate) that can be formed and controlled separately. This segmentation allows each gate to be optimized independently, making the overall gate formation process more manageable despite the high aspect ratio and tight spacing constraints
Solution Approach 2:
Different regions of the gate structure are assigned different properties - the first gate and second gate have different resistive characteristics and are biased differently. This local differentiation enables precise control of current flow through specific fins, addressing the control difficulty in high-density configurations
2Quantity of substance
If high aspect ratio fins are constructed with small dimensions and tight spacing to increase transistor density, then transistor density is improved, but the difficulty of controlling transistors increases
Solution Approach 1:
The control function is segmented across multiple gates, where the first gate controls current through first fins and the second gate controls current through second fins. This segmentation simplifies the control mechanism for each individual transistor path, making it easier to manage despite high overall density
Solution Approach 2:
The dual gate structure acts as an intermediary control mechanism between the control circuitry and the high-density fin array. By introducing this intermediate layer of control, the system can selectively activate specific fin paths, reducing the complexity of controlling individual transistors in the high-density configuration
3Quantity of substance
If high aspect ratio fins are constructed to increase transistor density, then transistor density is improved, but manufacturing efficiency decreases
Solution Approach 1:
The first gate and second gate are formed as separate structures during the manufacturing process, allowing for preliminary formation and optimization of each gate before final assembly. This preliminary action simplifies the overall manufacturing process by breaking it into manageable stages, improving efficiency despite the complex high-aspect-ratio structure
Data Source
AI summary
A semiconductor device is provided that includes a fin having a first upper gate on a sidewall of the fin in a first trench and a second upper gate formed on the opposite sidewall of the fin. The device also includes a first lower gate on the sidewall and a second lower gate on the opposite sidewall, wherein the first upper gate is formed above the first lower gate and the second upper gate is formed above the second lower gate. Methods of manufacturing and operating the device are also included. A method of operation may include biasing the first upper gate and second upper gate to preselect the transistors of a fin and then biasing the first lower gate and second lower gate to operate the transistors of the fin.