Double-Sided Interconnect Die Stacking Without TSVs or Interposers

Solution Overview

Problem

Existing semiconductor die stacking methods involving additional interconnecting elements like interposers or TSVs increase cost and complexity, and prolong die-to-die interconnect length.

Innovation Solution

A semiconductor package design where a first die has interconnect layers on both sides, allowing direct coupling to a second die without intervening structures like interposers or TSVs, reducing the need for additional layers and vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improveinterconnection functionalityVSAvoidstructure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the additional interconnecting elements (interposers, TSVs) from the traditional die-to-die interconnection structure. By forming interconnect layers directly on both sides of the first die, the invention removes the need for separate interposer structures and through-silicon vias, thereby reducing device complexity while maintaining interconnection functionality.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the interconnection function directly into the die structure itself by forming interconnect layers on both sides of the first die. This integration eliminates the need for separate interposer components, combining the die and interconnection structures into a unified design that reduces overall complexity.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but manufacturing cost increases

Engineering Contradiction:

Improveinterconnection functionalityVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates the additional interconnecting elements (interposers, TSVs) from the traditional die-to-die interconnection structure. By forming interconnect layers directly on both sides of the first die, the invention removes the need for separate interposer structures and through-silicon vias, thereby reducing device complexity while maintaining interconnection functionality.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs standard interconnect layer formation processes that are already part of conventional semiconductor manufacturing, replacing expensive and complex TSV and interposer structures with simpler, more cost-effective planar interconnect layers that can be formed using existing fabrication techniques.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Reliability

If additional interconnecting elements like interposers or TSVs are used for die-to-die interconnection, then interconnection functionality is achieved, but die-to-die interconnect length increases

Engineering Contradiction:

Improveinterconnection functionalityVSAvoidinterconnect length

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The patent extracts and eliminates the additional interconnecting elements (interposers, TSVs) from the traditional die-to-die interconnection structure. By forming interconnect layers directly on both sides of the first die, the invention removes the need for separate interposer structures and through-silicon vias, thereby reducing device complexity while maintaining interconnection functionality.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS20260018565A1Monolithic chip stacking using a die with double-sided interconnect layers

Publication Date: 2026.01.15 INTEL CORP

AI summary

An apparatus is provided which comprises: a first die having a first surface and a second surface, the first die comprising: a first layer formed on the first surface of the first die, and a second layer formed on the second surface of the first die; a second die coupled to the first layer; and a plurality of structures to couple the apparatus to an external component, wherein the plurality of structures is coupled to the second layer.