Double-Sided Electrode Semiconductor Package with Organic Substrate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packaging methods face challenges in reducing package size, flexibility in electrode connection, and high costs due to reliance on through-silicon vias and complex insulation processes, limiting the ability to freely form rewiring on the upper surface and connect multiple chips within a single substrate.
Innovation Solution
A semiconductor device with a double-sided electrode structure using a multilayer organic substrate with recess portions and resin sealing, where wiring traces are formed on the upper surface and connected to multilayer wiring, allowing for flexible connection patterns and the incorporation of multiple chips, utilizing metal particles and atomic hydrogen reduction for cost-effective manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-silicon via structure is used for dual-face packaging, then electrode connection between upper and lower faces is achieved, but manufacturing complexity and cost increase due to high-temperature insulation treatment requirements
Solution Approach 1:
The invention extracts the through-hole formation step from the manufacturing process by using surface-mounted protrusion electrodes instead of through-silicon vias. This eliminates the need for high-temperature insulation treatment and complex drilling operations, thereby reducing manufacturing complexity while maintaining electrode connection functionality
Solution Approach 2:
The invention uses a cost-effective organic substrate with printed circuit board technology instead of expensive through-silicon via structures. The protrusion electrodes are formed through low-cost plating processes on the substrate surface, making the overall manufacturing process more economical
2Reliability
If conventional dual-face package structures are used, then electrode connection is provided, but flexibility in connection patterns between upper and lower faces is limited due to identical electrode arrangements
Solution Approach 1:
The invention creates asymmetric electrode arrangements where the upper face has bump electrodes and the lower face has protrusion electrodes with different patterns. This asymmetry allows flexible connection designs where electrodes on opposite faces do not need to be in identical positions, enabling various connection patterns between upper and lower ICs
Solution Approach 2:
The invention introduces wiring traces on the substrate that can route connections in two-dimensional space rather than requiring direct vertical alignment. This allows signals to travel laterally across the substrate, providing flexibility in connecting electrodes that are not directly opposite each other
3Reliability
If through-holes are formed in semiconductor substrate for insulation, then electrode separation is achieved, but manufacturing difficulty increases due to high-temperature treatment requirements
Solution Approach 1:
The invention removes the through-hole drilling and insulation filling steps from the manufacturing process. Instead, insulation is achieved through the organic substrate material itself and surface-level wiring trace routing, eliminating high-temperature processing requirements and simplifying manufacturing
Solution Approach 2:
The invention replaces mechanical drilling and chemical insulation filling with a printed circuit board approach where insulation is provided by the substrate material and surface wiring. This substitution eliminates complex mechanical and chemical processes in favor of simpler, lower-temperature manufacturing techniques
4Reliability
If low-resistance metallic film plating is used for rewiring on upper surface, then electrode connection is achieved, but manufacturing cost increases significantly
Solution Approach 1:
The invention uses cost-effective printing techniques (screen printing or inkjet printing) to deposit conductive paste for rewiring instead of expensive low-resistance metallic film plating. While the resistance may be slightly higher, the significant cost reduction makes this economically viable for the application
Solution Approach 2:
The invention changes the manufacturing parameter from electroplating to printing deposition. This parameter change allows for lower material costs and simpler processing equipment while achieving sufficient electrical connection for the application requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the low-cost, high-density manufacturing of thin double-sided electrode packages with flexible connection patterns, allowing arbitrary wiring trace placement and reducing manufacturing complexity and costs.
Implementation Method 1
Wiring traces are formed on an upper surface of the charged resin such that the wiring traces are connected to wiring traces for terminals (hereinafter referred to as 'terminal wiring traces') connected to the multilayer wiring on a front face of the package substrate, and are connected to front-face bump electrodes for external connection on the upper surface of the resin
Data Source
AI summary
According to the present invention, a recess portion is formed in a package substrate which is formed of a multilayer organic substrate having a multilayer wiring, and an LSI chip is accommodated within the recess portion. Wiring traces are formed on the upper surface of a resin which seals the LSI chip connected to the multilayer wiring. The wiring traces are connected to terminal wiring traces connected to the multilayer wiring on the front face of the package substrate and to front-face bump electrodes for external connection on the upper surface of the resin. On the back face side of the package substrate, back-face bump electrodes for external connection are formed and connected to the multilayer wiring.


