Double-Sided Network Fabrication via Conformal ALD Seed Layers
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Solution Overview
Problem
Existing methods for creating double-sided, high-density RF/DC networks on metal substrates face challenges such as dielectric planarity issues due to lamination/extrusion processes causing depressions and protrusions, and limited metal coverage of through-substrate coaxial vias due to inadequate metal deposition throwing power.
Innovation Solution
A process involving filling substrate holes with liquid crystal polymer (LCP), laminating LCP films, creating high-aspect ratio through-holes, depositing conformal alumina coatings using atomic layer deposition (ALD), and performing high power impulse magnetron sputtering (HiPIMS) to form continuous seed layers within these holes, ensuring uniform metal coverage and reducing patterning defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If lamination/extrusion processes are used to create dielectric layers, then double-sided networks can be fabricated, but dielectric planarity deteriorates with depressions and protrusions forming
Solution Approach 1:
A planarization layer is deposited over the dielectric layers before via formation to pre-flatten the surface topology. This preliminary planarization action prevents subsequent patterning defects by eliminating depressions and protrusions that would otherwise cause alignment issues in later photolithography steps.
Solution Approach 2:
The planarization layer acts as an intermediary between the non-planar dielectric layers and the subsequent via formation processes. This intermediate layer provides a flat working surface for via patterning while the via fill process subsequently restores material in the depressed areas, effectively mediating the topography issue.
2Ease of manufacture
If conventional metal deposition is used for through-hole metallization, then via formation is achieved, but metal coverage deteriorates with limited throwing power
Solution Approach 1:
A conductive adhesive promoter layer is deposited as an intermediary between the via wall and the copper fill material. This promoter layer improves the throwing power of the electroplating process by providing better nucleation sites and adhesion, ensuring complete and uniform metal coverage throughout high-aspect-ratio vias that conventional deposition cannot achieve.
Solution Approach 2:
The via structure becomes a composite system with multiple functional layers: dielectric material, planarization layer, conductive adhesive promoter, and copper fill. This composite approach combines materials with complementary properties to achieve both mechanical integrity and complete electrical conductivity through the via structure.
3Productivity
If high-aspect ratio through-holes are created, then via density increases, but metal deposition difficulty increases due to limited throwing power
Solution Approach 1:
The conductive adhesive promoter serves as a mediator that enables metal deposition in high-aspect-ratio vias by improving the wetting and adhesion properties of the via walls. This intermediary layer allows electroplating to effectively reach the bottom of narrow, deep vias where conventional direct deposition would fail to provide adequate coverage.
Solution Approach 2:
The invention changes the chemical and physical parameters of the via wall surface by introducing the conductive adhesive promoter layer. This parameter change in surface chemistry and morphology enables the metal deposition process to achieve adequate throwing power and complete coverage in high-aspect-ratio structures that would otherwise be infeasible.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves improved dielectric planarity, reduces patterning defects, and enhances metal coverage in through-holes, leading to more reliable and efficient double-sided, high-density RF/DC network fabrication with reduced risk of short circuits and size discrepancies.
Implementation Method 1
laminating films of the dielectric material on either side of the substrate
Implementation Method 2
opening a through-hole through the dielectric material at the hole
Implementation Method 3
depositing, by atomic layer deposition (ALD), conformal coatings of alumina onto interior surfaces of each of the through-holes
Implementation Method 4
executing high power impulse magnetron sputtering (HiPIMS) to form, on the conformal coatings, seed layers extending continuously along entire lengths of each of the through-holes
Data Source
AI summary
A conductive network fabrication process is provided and includes filling a hole formed in a substrate with dielectric material, laminating films of the dielectric material on either side of the substrate, opening a through-hole through the dielectric material at the hole, depositing a conformal coating of dielectric material onto an interior surface of the through-hole and executing seed layer metallization onto the conformal coating in the through-hole to form a seed layer extending continuously along an entire length of the through-hole.