Double Trench Side Contact Fabrication for Low Resistance Bit Lines
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Solution Overview
Problem
As semiconductor devices are miniaturized, forming side contacts that selectively expose one sidewall of an active region with even depth becomes challenging due to the decreasing width and increasing depth of active regions, leading to difficulties in reducing buried bit line resistance and maintaining device characteristics.
Innovation Solution
A method involving a double trench process is used, where a first trench and a second trench are formed with insulation layers, and portions of these layers are removed to create a side contact that exposes a portion of the second trench's sidewall, allowing for the formation of junction regions and buried bit lines with reduced resistance through the use of metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If ion implantation process is used to form buried bit lines, then the process is simple, but the resistance of buried bit lines cannot be reduced sufficiently in miniaturized devices
Solution Approach 1:
The patent changes the material parameter of the buried bit line from doped semiconductor (ion implantation) to metal layer, fundamentally altering the electrical resistance characteristic. This material substitution enables sufficient resistance reduction in miniaturized devices while maintaining process feasibility through standard metal deposition techniques.
2Productivity
If active region width is decreased and depth is increased for higher integration, then integration scale increases, but side contact formation becomes difficult and depth uniformity deteriorates
Solution Approach 1:
The patent introduces a lateral dimension approach by forming the side contact through sidewall exposure of the active region. Instead of attempting to form contacts from the top surface (vertical dimension), the method exposes the sidewall and forms the contact laterally, enabling precise depth control and uniformity even as active region dimensions change for higher integration.
Solution Approach 2:
The patent uses an intermediary structure (the exposed sidewall of the active region) to facilitate side contact formation. By creating a controlled exposure of the sidewall through selective removal of overlying layers, the method enables precise contact formation at the desired depth with uniformity, acting as a mediator between the active region and the contact structure.
3Ease of manufacture
If conventional side contact process is used, then process steps are established, but selective exposure of one sidewall with even depth becomes difficult in miniaturized devices
Solution Approach 1:
The patent applies asymmetry by selectively exposing only one sidewall of the active region for side contact formation, rather than treating all sidewalls symmetrically. This asymmetric approach enables precise control over which sidewall is exposed and at what depth, achieving manufacturing precision required for miniaturized devices while maintaining an established process framework.
Data Source
AI summary
A method for fabricating a semiconductor device is provided, the method includes forming a double trench including a first trench and a second trench formed below the first trench and having surfaces covered with insulation layers, and removing portions of the insulation layers to form a side contact exposing one sidewall of the second trench.