DPT Compatible Standard Cell Design Rules for IC Layout

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Solution Overview

Problem

In integrated circuits, double patterning technology (DPT) often results in design rule violations when standard cells with tight pitch interconnect and via levels are placed adjacent to each other, leading to blurring and conflicts across cell boundaries.

Innovation Solution

A set of DPT compatible standard cell design rules is introduced, including unidirectional power rails, restricted geometry placement, and color reversal, to prevent across-cell boundary design rule violations, allowing for the creation of standard cells that can be placed without conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If double patterning technology is used to print patterns with tighter pitch, then manufacturing precision is improved, but device complexity increases due to multiple photomasks and process steps

Engineering Contradiction:
Improvepitch precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the standard cell layout into distinct regions with specific DPT-compatible design rules. By dividing the cell into controlled zones with restricted geometry placements and unidirectional power rails, the method enables DPT compatibility while managing the complexity of multiple photomasks through systematic layout organization.

Inventive Principle:
Principle #1Segmentation

2Productivity

If standard cells are placed adjacent to each other to increase productivity, then manufacturing efficiency is improved, but design rule violations occur across cell boundaries

Engineering Contradiction:
Improvecell placement densityVSAvoiddesign rule compliance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary actions by establishing DPT-compatible design rules during the standard cell design phase. Restrictions on geometry placement, unidirectional power rail configurations, and controlled via placements are implemented beforehand, ensuring that when cells are placed adjacent to each other, no DPT conflicts or design rule violations occur across boundaries.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements local quality by applying specific design rules to different regions within standard cells. Certain areas have restricted geometry placements while others have unidirectional power rails, creating locally optimized zones that ensure DPT compatibility when cells are placed together, thus maintaining reliability without sacrificing productivity.

Inventive Principle:
Principle #3Local quality

3Reliability

If across-cell boundary design rule violations are prevented through restricted geometry placement, then design reliability is improved, but cell layout flexibility decreases

Engineering Contradiction:
ImproveDPT complianceVSAvoidlayout flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent achieves universality by creating standardized DPT-compatible design rules that can be applied to all standard cells uniformly. The unidirectional power rail configuration and restricted geometry placement rules serve multiple functions: they prevent DPT conflicts across boundaries, ensure design rule compliance, and maintain layout flexibility through a systematic approach that works across different cell types and placements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8756550B2Method to ensure double patterning technology compliance in standard cells
Publication Date: 2014.06.17 TEXAS INSTRUMENTS INC
  • US8756550B2 patent drawing
  • US8756550B2 patent drawing
  • US8756550B2 patent drawing

AI summary

An integrated circuit with standard cells with top and bottom metal-1 and metal-2 power rails and with lateral standard cell borders that lie between an outermost vertical dummy poly lead from one standard cell and an adjacent standard cell. A DPT compatible standard cell design rule set. A method of forming an integrated circuit with standard cells constructed using a DPT compatible standard cell design rule set. A method of forming DPT compatible standard cells.