DPU RegEx Accelerators for Query Predicate Processing

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Solution Overview

Problem

Current data analytics platforms face inefficiencies in processing large volumes of data due to reliance on general-purpose processors for query predicate execution, leading to slow analytics operations.

Innovation Solution

The implementation of data flow graph-driven analytics platforms utilizing highly programmable data processing units (DPUs) with hardware-based accelerators, such as regular expression engines, to efficiently process data streams by transforming queries into DFA and NFA representations and applying them directly to data flows.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If general-purpose processors are used for query predicate execution, then device versatility is maintained, but processing speed deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoidprocessor architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system segments the data processing architecture by introducing specialized DPU hardware units that handle specific data stream processing tasks (filtering, pattern matching, aggregation) separately from general-purpose query execution. This segmentation allows parallel processing where DPUs handle high-speed data manipulation while general-purpose processors handle query logic, resolving the contradiction between speed and versatility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces data flow graphs as an intermediary representation layer between queries and execution. The data flow graph compiler translates queries into intermediate data flow representations that can be efficiently executed by specialized DPU hardware. This intermediary enables optimal mapping of query operations to hardware accelerators, achieving high processing speed while maintaining query flexibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If specialized hardware accelerators are introduced, then processing efficiency improves, but device complexity increases

Engineering Contradiction:
Improveanalytics processing throughputVSAvoidhardware architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The DPU hardware architecture is designed with universal, reconfigurable components that can perform multiple data stream processing functions (filtering, pattern matching, aggregation, joining) through a common hardware framework. This multi-functionality allows the system to achieve high productivity for various analytics operations without proportionally increasing hardware complexity, as the same hardware infrastructure serves multiple purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system uses parameterized data flow graph representations where query operations are defined by configurable parameters rather than hard-coded hardware logic. This allows the same hardware accelerator to adapt to different query types and data operations by changing operational parameters, thereby improving productivity without requiring complex hardware reconfiguration for each query scenario.

Inventive Principle:
Principle #35Parameter changes

3Speed

If data is processed as high-speed streams, then processing speed improves, but measurement and control difficulty increases

Engineering Contradiction:
Improvedata processing speedVSAvoidquery predicate evaluation difficulty
Core Design Contradiction:
SpeedVSDifficulty of detecting and measuring

Solution Approach 1:

The system performs preliminary transformation of queries into data flow graph representations before execution. This pre-processing step compiles query predicates into optimized data stream operations, establishing evaluation logic in advance. During high-speed stream processing, the pre-compiled data flow graphs guide the DPUs to efficiently evaluate predicates without real-time compilation complexity, resolving the contradiction between speed and measurement difficulty.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11636115B2Query processing using data processing units having DFA/NFA hardware accelerators
Publication Date: 2023.04.25 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11636115B2 patent drawing
  • US11636115B2 patent drawing
  • US11636115B2 patent drawing

AI summary

A system comprises a data source storing data, a data processing unit (DPU) comprising an integrated circuit having programmable processor cores and a hardware-based regular expression (RegEx) engine, and a control node configured to generate a data flow graph for configuring the DPUs to execute the analytical operation to be performed on the data. The analytical operation specifies a query having at least one query predicate. A controller is configured to receive the data flow graph and, in response, configures the DPU to input the data as one or more data streams, and configure the RegEx engine to operate according to one or more deterministic finite automata (DFAs) or non-deterministic finite automata (NFAs) to evaluate the query predicate against the data by applying one or more regular expressions to the one or more data streams.