DRAM Sampling Rate Adjustor Circuit for Targeted Refresh
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Solution Overview
Problem
Volatile memory devices, such as DRAM, face data degradation issues due to repeated access patterns that increase the degradation rate of nearby memory cells, necessitating targeted refresh operations to prevent information loss.
Innovation Solution
A sampling rate adjustment mechanism is implemented, using a sampling circuit and adjustor circuit to monitor and adjust the sampling rate based on actual refresh operations, temperature, and RFM commands, ensuring matched rates for effective targeted refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling rate is increased to accurately monitor memory cell degradation, then the data integrity is improved, but the power consumption and device complexity increase
Solution Approach 1:
The refresh control circuit autonomously monitors its own refresh operation rate and self-adjusts the sampling rate without requiring external control signals. The circuit uses internal counters and comparators to compare actual refresh rates with expected rates, and automatically generates adjusted sampling rates to maintain synchronization between sampling and refresh operations.
2Reliability
If the sampling rate is adjusted dynamically to match refresh operations, then the targeted refresh effectiveness is improved, but the control mechanism complexity increases
Solution Approach 1:
The refresh control circuit implements a feedback mechanism where the actual refresh operation rate is continuously monitored and fed back to the sampling rate generator. The circuit compares the actual refresh rate with the expected refresh rate, and uses this feedback information to dynamically adjust the sampling rate, ensuring that sampling remains synchronized with refresh operations under varying workload conditions.
Solution Approach 2:
The sampling rate is made dynamic rather than fixed, allowing it to adapt to changing refresh operation rates. The circuit uses counters to track refresh operations over time windows and adjusts the sampling rate accordingly, enabling the system to respond to varying memory access patterns and refresh requirements without requiring external reconfiguration.
3Reliability
If refresh operations are performed more frequently to prevent data degradation, then the data integrity is improved, but the power consumption increases
Solution Approach 1:
The circuit performs sampling at a rate that is partially excessive relative to the minimum required refresh rate, using counter-based measurement over time windows. This allows the system to occasionally sample more frequently than strictly necessary to detect degradation patterns, while maintaining overall power efficiency by using the measurement results to guide targeted refresh operations only when needed.
Data Source
AI summary
Apparatuses, systems, and methods for sample rate adjustment. A memory may sample row addresses based on a sampling rate to determine aggressor addresses. The memory includes a sample adjustment circuit which monitors a rate of refresh operations and adjusts the sampling rate based on the monitored rate. The sample adjustment circuit may provide a calculated temperature value based on the monitored rate, and the calculated temperature may be used to set a sampling rate. The refresh rate may be based on a measured temperature.