DRAM Self-Refresh via Word-Line Retention Analysis
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) experiences data damage due to insufficient charge storage in capacitors, leading to high standby current consumption as periodic refresh is necessary even in standby mode.
Innovation Solution
A memory device with a self-refresh function that adjusts the refresh frequency based on the retention capability of word-lines, reducing the number of refresh actions for cells with better retention, thereby minimizing power consumption in standby mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic refresh action is executed for all cells in standby mode, then data reliability is maintained, but standby current consumption increases
Solution Approach 1:
The patent segments the memory array into multiple banks, with each bank having independent refresh control. The memory device can selectively activate refresh operations in specific banks based on their retention characteristics, rather than refreshing the entire array uniformly. This segmentation enables differential refresh strategies that reduce overall standby current while maintaining data reliability in active banks.
Solution Approach 2:
The patent implements local quality by assigning different refresh rates to different word lines or memory banks based on their specific retention capabilities. Cells with better retention characteristics undergo less frequent refresh operations, while cells with poorer retention receive more frequent refreshes. This localized differentiation optimizes the balance between data reliability and power consumption.
Solution Approach 3:
The patent introduces dynamic refresh rate adjustment based on detected retention characteristics. The system can adaptively modify refresh frequencies in response to changing conditions such as temperature variations or aging effects. This dynamic approach allows the memory device to maintain optimal refresh rates that ensure data reliability while minimizing standby current consumption under different operating conditions.
2Use of energy by moving object
If refresh frequency is reduced for cells with better retention capability, then standby current consumption decreases, but data reliability may be compromised
Solution Approach 1:
The patent incorporates feedback mechanisms that continuously monitor data integrity and retention characteristics of memory cells. Based on this feedback, the system dynamically adjusts refresh rates for different word lines or banks. The feedback loop ensures that refresh operations are maintained at frequencies sufficient to preserve data reliability while optimizing power consumption by reducing unnecessary refreshes in high-retention cells.
Solution Approach 2:
The patent changes the refresh rate parameter dynamically based on measured retention characteristics of different memory regions. By adjusting this critical parameter according to actual cell performance rather than applying a uniform rate, the system achieves lower standby current consumption without compromising data reliability in cells that require less frequent refreshes.
Data Source
AI summary
A memory device coupled to a memory controller and including a memory array and an access circuit is provided. The memory array includes a plurality of cells. Each of the cells is coupled to a word-line. The access circuit is coupled between the memory controller and the memory array. In a normal mode, the access circuit executes a refresh action for the cells which are coupled to at least one word-line in response to the memory controller outputting an auto-refresh command. In a standby mode, the access circuit selects one of the word-lines and determines whether to execute the refresh action for the cells coupled to the selected word-line according to the retention capability of the selected word-line at regular time intervals.