DRAM Time Margin Adjustment via Dynamic Delay Control

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Solution Overview

Problem

Dynamic Random Access Memory (DRAM) performance is affected by fixed delay adjustment values that do not adapt to varying environmental conditions, leading to suboptimal performance under different voltage and temperature conditions.

Innovation Solution

A method and circuit for dynamically adjusting the target delay value in DRAM by determining voltage and temperature parameters and using a preset time margin model to control the working states of delay sub-circuits, ensuring optimal delay values across various conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a fixed delay adjustment value is determined before the DRAM leaves the factory, then the manufacturing process is simplified and manufacturing precision is improved, but the adaptability to different environmental conditions deteriorates

Engineering Contradiction:
Improvedelay adjustment value determinationVSAvoidadaptability to environmental conditions
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic delay adjustment mechanism that transitions from a fixed factory-determined value to a runtime-adjustable value based on actual environmental conditions. The delay adjustment value is no longer static but dynamically adapts to voltage and temperature changes during operation, resolving the contradiction between manufacturing simplicity and environmental adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of delay adjustment value from a fixed constant to a variable that changes based on environmental conditions. By introducing voltage parameter and temperature parameter as inputs, the system dynamically adjusts the delay value to match actual operating conditions, thereby improving adaptability without compromising manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the delay adjustment value is fixed and cannot be changed, then device complexity is reduced, but the reliability under varying environmental conditions deteriorates

Engineering Contradiction:
Improvedelay adjustment mechanismVSAvoidreliability under environmental conditions
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a feedback mechanism where voltage parameter and temperature parameter are detected during operation, and the delay adjustment value is adjusted based on this feedback. This closed-loop control system ensures that the delay value continuously adapts to environmental changes, improving reliability while adding only minimal complexity through standard sensing and control circuitry.

Inventive Principle:
Principle #23Feedback

3Device complexity

If a fixed target delay value is used, then the calculation process is simplified, but the time margin under different working conditions deteriorates

Engineering Contradiction:
Improvecalculation processVSAvoidtime margin
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the target delay value from a fixed parameter to a dynamically calculated parameter based on voltage and temperature conditions. By introducing environmental parameters into the calculation, the system achieves better time margins under varying working conditions while the calculation complexity remains manageable through the use of established timing models.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12033685B2Method for adjusting margin, circuit for adjusting margin and memory
Publication Date: 2024.07.09 CHANGXIN MEMORY TECH INC
  • US12033685B2 patent drawing
  • US12033685B2 patent drawing
  • US12033685B2 patent drawing

AI summary

A method for adjusting margin, a circuit for adjusting margin, and a memory are provided. The method is applicable for a memory including a plurality of delay sub-circuits. The method includes: determining a voltage parameter and a temperature parameter, obtaining a target delay value by performing calculation on the voltage parameter and the temperature parameter through a preset time margin model; and adjusting a time margin of the memory by controlling working states of the plurality of delay sub-circuits according to the target delay value.