DRAM Bit Line Oxide Barrier for Leakage-Safe Capping

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Solution Overview

Problem

As DRAM devices become more highly integrated, the reduced size leads to issues with leakage current, and the manufacturing process of the capping layer can negatively impact the electrical performance of components, necessitating improved insulation and protection methods.

Innovation Solution

A semiconductor structure is developed with a bit line structure including a conductive silicon layer, a conductive layer, and a hard mask layer, where an oxide barrier layer is formed through plasma treatment to directly contact the bit line structure, preventing diffusion from the capping layer and maintaining electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a capping layer is added to protect components and prevent leakage current, then reliability is improved, but the manufacturing process adversely affects electrical performance

Engineering Contradiction:
Improveleakage current protectionVSAvoidelectrical performance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

An oxide barrier layer is introduced as an intermediary between the bit line structure and the capping layer. This barrier layer prevents direct contact and harmful interactions during the capping layer formation process, allowing the capping layer to provide leakage protection without adversely affecting the electrical performance of underlying components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The oxide barrier layer is formed in advance before the capping layer is deposited. This preliminary action prepares the surface and establishes protective characteristics that prevent subsequent manufacturing steps from damaging the electrical performance of the bit line structure.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If device size is reduced to achieve higher integration, then productivity is improved, but leakage current increases

Engineering Contradiction:
Improveintegration densityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Thin film oxide barrier layers are used to provide effective leakage protection in highly integrated devices. These thin films maintain electrical isolation and prevent leakage current while occupying minimal space, allowing continued device scaling and high integration without sacrificing reliability.

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The oxide barrier layer effectively blocks element diffusion, ensuring the semiconductor structure's electrical performance is not adversely affected during the capping layer formation, thus enhancing the insulation and protection of DRAM device components.

Implementation Method 1

the oxide barrier layer effectively blocks element diffusion, ensuring the semiconductor structure maintains excellent electrical performance

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

the oxide barrier layer is formed through a plasma treatment to prevent element diffusion

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20240172414A1Semiconductor structure and manufacturing method thereof
Publication Date: 2024.05.23 NAN YA TECH
  • US20240172414A1 patent drawing
  • US20240172414A1 patent drawing
  • US20240172414A1 patent drawing

AI summary

A semiconductor structure includes a substrate, a bit line structure, an oxide barrier layer, and a bit line capping layer. The bit line structure is disposed on the substrate, in which the bit line structure includes a conductive silicon layer, a conductive layer, and a hard mask layer. The conductive layer is disposed on the conductive silicon layer, in which the conductive layer includes a metal. The hard mask layer is disposed on the conductive layer. The oxide barrier layer is disposed in direct contact with a sidewall of the bit line structure. The bit line capping layer covers the oxide barrier layer.