DRAM Block Refresh Scheme for Row Hammer Protection
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Solution Overview
Problem
Existing DRAM memory protection methods against row hammering are inadequate as they rely on the physical isolation of memory point matrices, which may be too large for optimal management, especially when the hammering range exceeds matrix boundaries.
Innovation Solution
A method and device that includes activation counters for each memory block, triggering preventive refreshes of the block and adjacent blocks when activation counters exceed a threshold, and optionally incrementing adjacent block counters during activations to mitigate row hammering effects across larger ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory point matrices are used for isolation, then row hammering protection is provided within matrix boundaries, but the solution becomes inadequate when hammering range exceeds matrix size
Solution Approach 1:
The memory device is segmented into multiple memory blocks, each with its own activation counter. This segmentation allows independent monitoring and refresh of each block, enabling protection to extend beyond single matrix boundaries while maintaining manageable isolation units.
Solution Approach 2:
Adjacent memory blocks are merged into a shared refresh operation. When any block in a group reaches its activation threshold, all blocks in that group are refreshed together, providing coordinated protection across matrix boundaries without requiring separate refresh mechanisms for each block.
2Adaptability or versatility
If activation counters are implemented for each memory block, then protection coverage extends beyond matrix boundaries, but device complexity increases
Solution Approach 1:
The refresh mechanism serves multiple functions: it refreshes the activated block individually when needed, and it can refresh multiple adjacent blocks simultaneously when hammering threats are detected. This multi-functionality reduces the need for separate specialized circuits for each protection scenario.
Solution Approach 2:
Activation counters continuously monitor and count row activations in advance, triggering preventive refresh operations before actual row hammering damage occurs. This preliminary action prevents the need for more complex damage detection and repair mechanisms.
3Reliability
If preventive refresh of adjacent blocks is performed, then row hammering protection is enhanced across block boundaries, but refresh overhead and energy consumption increase
Solution Approach 1:
The refresh operation is applied locally only to affected memory blocks and their immediate neighbors, rather than refreshing the entire memory device. This localized approach provides adequate protection against row hammering while minimizing unnecessary energy consumption from refreshing unaffected blocks.
Solution Approach 2:
Refresh operations are performed periodically based on activation counter thresholds rather than continuously. This periodic action allows the system to balance protection needs with energy consumption by refreshing only when activation patterns indicate potential row hammering threats.
Data Source
AI summary
The invention relates to a method for protecting a memory device (1) from the effect of row hammering. The memory device (1) comprises a DRAM unit (U) formed by a plurality of memory point matrices (MAT1-MATN) subdivided into a plurality of memory blocks (B1-BM). The memory device (1) comprises activation counters (CTR1-CTRM) respectively associated with the memory blocks (B1-BM). The method comprises the execution, with each activation of a row of a given block (Bi), of a step of incrementing the activation counter (CTRi) associated with the given block (Bi); and the initiation of the preventive refresh of all the rows of the given block (Bi) when the activation counter (CTRi) of this given block (Bi) exceeds a threshold value (Si). The protection method also comprises at least one of the operations aimed at: —including, in the preventive refresh, at least some of the rows of at least one block directly adjacent (Bi+1, Bi−1) to the given block (Bi); —incrementing, during the activation of the row or of certain rows of the given block (Bi), the activation counter (CTRi−1, CTRi+1) of at least one block directly adjacent (Bi−1, Bi+1) to the given block (Bi) and initiating the preventive refresh of all the rows of the adjacent block (Bi−1, Bi+1) when the activation counter (CTRi−1, CTRi+1) associated with this adjacent block (Bi−1, Bi+1) exceeds a threshold value (Si−1, Si+1).