DRAM Capacitor Hole Etching With a Protective Support Layer

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Solution Overview

Problem

During the manufacturing of Dynamic Random Access Memory (DRAM), the reduction in the height of the electrode support structure due to direct masking and etching processes leads to a decrease in capacitor height and storage performance.

Innovation Solution

A protective layer is introduced between the electrode support structure and the first mask layer to prevent damage during the etching process, ensuring the height of the electrode support structure and maintaining the contact area with the capacitor holes, thereby enhancing storage performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If direct masking and etching processes are used on the electrode support structure, then the manufacturing process is simple and fast, but the height of the electrode support structure is reduced, leading to decreased capacitor height and storage performance

Engineering Contradiction:
Improvemanufacturing speedVSAvoidheight of electrode support structure
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

A protective layer is formed on the electrode support structure before the etching process. This preliminary protective action prevents the mask layer from directly contacting and damaging the electrode support structure during etching, thereby maintaining the original height and storage performance while still enabling efficient manufacturing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer serves as an intermediary between the mask layer and the electrode support structure. It allows the etching process to proceed efficiently while preventing direct harmful interaction between the mask layer and the electrode support structure, thus preserving the critical height dimension

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the mask layer is placed directly on the electrode support structure, then the device structure is simple, but the electrode support structure is damaged during etching, reducing storage performance

Engineering Contradiction:
Improvestructure complexityVSAvoidstorage performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The protective layer is formed in advance on the electrode support structure before the mask layer is applied. This preliminary protective measure ensures that the electrode support structure is not damaged during subsequent etching operations, maintaining storage performance while adding only one additional layer to the structure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as an intermediary protective barrier between the mask layer and the electrode support structure. It enables the etching process to be performed without direct contact between the mask layer and the electrode support structure, thus preventing damage and ensuring reliable storage performance with minimal structural complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12082393B2Method for manufacturing memory and memory
Publication Date: 2024.09.03 CHANGXIN MEMORY TECH INC
  • US12082393B2 patent drawing
  • US12082393B2 patent drawing
  • US12082393B2 patent drawing

AI summary

A method for manufacturing a memory and a memory is provided. The method for manufacturing a memory includes: providing a substrate; stacking an electrode support structure, a protective layer and a first mask layer in sequence on the substrate; patterning the first mask layer on an array region, and etching the protective layer, the electrode support structure and the substrate by using the patterned first mask layer as a mask, to form capacitor holes penetrating the protective layer and the electrode support structure and extending into the substrate; removing the first mask layer; and forming a first electrode layer on side walls and bottom walls of the capacitor holes, a top surface of the first electrode layer being flush with a top surface of the electrode support structure.