DRAM Capacitor Interface Doping for Lower Leakage Current
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Solution Overview
Problem
The increasing integration density of integrated circuit devices, such as DRAM, leads to a decrease in the area occupied by capacitors, resulting in undesirable leakage current through the dielectric film between the electrodes, which affects the electrical characteristics and capacitance.
Innovation Solution
A doped upper interface film is formed using atomic layer deposition (ALD) with a small amount of dopants like tin (Sn), molybdenum (Mo), niobium (Nb), tantalum (Ta), and aluminum (Al) between the dielectric film and the upper electrode to reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the area of capacitor is decreased to increase integration density, then productivity is improved, but leakage current increases
Solution Approach 1:
The patent applies local quality by creating a doped upper interface film with specific dopant concentration at the interface between the dielectric film and upper electrode. This localized doping region provides different electrical properties (lower leakage current) at the critical interface area while maintaining the overall small capacitor area required for high integration density.
Solution Approach 2:
The patent changes the chemical composition parameter of the upper interface film by introducing dopants (such as tungsten, molybdenum, niobium, tantalum, or aluminum) at controlled concentrations. This parameter change modifies the electrical characteristics of the interface, reducing leakage current while maintaining the capacitor's compact structure.
2Area of stationary object
If the area of capacitor is decreased to increase integration density, then area occupied by capacitor is reduced, but capacitance maintenance becomes difficult
Solution Approach 1:
The doped upper interface film creates a localized region with optimized electrical properties at the dielectric-electrode interface. This local modification improves the interface quality and reduces leakage pathways, enabling the capacitor to maintain desired capacitance values even with reduced overall area.
Solution Approach 2:
The patent employs composite material structure by combining the dielectric film with a doped upper interface film layer. This composite structure leverages the high dielectric constant of the dielectric film while the doped interface layer provides improved electrical characteristics, achieving both area reduction and capacitance maintenance.
3Reliability
If a doped upper interface film is formed with dopants using ALD, then leakage current is decreased, but manufacturing process complexity increases
Solution Approach 1:
The doped upper interface film acts as an intermediary layer between the dielectric film and the upper electrode. This intermediate layer mediates the electrical interaction at the interface, providing a transition region that reduces leakage current while the ALD process provides precise control over the doping composition.
Solution Approach 2:
The ALD process enables precise control of dopant concentration and film thickness parameters. By adjusting these parameters, the manufacturing process can be optimized to achieve the desired leakage current reduction while minimizing the added process complexity through controlled deposition conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The doped upper interface film effectively decreases leakage current while maintaining or increasing capacitance, overcoming spatial and design rule limitations in high-density integrated circuit devices.
Implementation Method 1
forming a doped upper interface film, which is doped with a very small amount of dopants using atomic layer deposition (ALD), at the interface between the capacitor dielectric film and the upper electrode
Data Source
AI summary
A method of manufacturing an integrated circuit device includes forming a plurality of lower electrodes above a substrate, forming a dielectric film on the plurality of lower electrodes, forming a doped upper interface film on the dielectric film, and forming an upper electrode on the doped upper interface film, wherein the doped upper interface film includes a dopant, and the dopant includes one selected from tin (Sn), molybdenum (Mo), niobium (Nb), tantalum (Ta), and aluminum (Al).


