DRAM ECC Layout Using CRC to Recover Uncorrectable Errors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current error correction codes (ECC) in DRAM devices are limited in their ability to correct uncorrectable errors, as they require significant memory space for ECC information, reducing the available capacity for data storage and metadata.
Innovation Solution
A memory device configuration that allocates a portion of memory elements for data, another portion for ECC information, and a third portion for error detection code, allowing for efficient detection and correction of errors by recalculating error detection codes to identify fault locations and correct up to four errors without increasing ECC storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC symbols are added to detect and correct memory errors, then error detection and correction capability is improved, but the capacity of the DRAM device for data storage is reduced
Solution Approach 1:
The patent segments the memory device into distinct portions: a first portion for data storage, a second portion for ECC information, and a third portion for error detection code. This segmentation allows the ECC functionality to be isolated from the data storage area, enabling the data portion to be optimized for maximum capacity while the ECC portions maintain error correction capabilities without compromising either function.
2Reliability
If more ECC symbols are stored to correct additional errors, then error correction capability is improved, but the memory space available for data and metadata is reduced
Solution Approach 1:
The patent applies local quality by storing different types of information in different portions of the memory device. The first portion is optimized for data storage with high density, while the second and third portions are dedicated to ECC information with appropriate error correction capabilities. This localized allocation ensures that each portion serves its specific function optimally without wasting space on unnecessary ECC symbols in data storage areas.
3Reliability
If ECC information is stored in DRAM elements, then error detection and correction is enabled, but the available elements for data storage are reduced
Solution Approach 1:
The patent divides the memory elements into distinct segments: a first portion for data, a second portion for ECC information, and a third portion for error detection code. This segmentation allows the system to maintain adequate data storage elements while incorporating necessary ECC functionality in separate portions, ensuring that the data storage capacity is maximized without being过度 consumed by ECC overhead.
Data Source
AI summary
The technology is directed to error detection and correction in a memory device containing dynamic random-access memory (DRAM) elements. The DRAM elements are configured to store data in a first number of elements, store error correction code (ECC) information in a second number of elements and storing an error correction code in a third number of elements. The amount of memory allocated to ECC is reduced without adversely affecting the ECC capability by storing an error correction code, such as a cyclic redundancy code (CRC) in the freed-up memory space. A location of an uncorrectable error is identified assuming one of the elements contains an error then recalculating the selected data using the ECC, recalculating the CRC and comparing it to the original CRC. A match indicates the faulty value has been found and corrected. A mismatch indicates that the selected element is not the location of the error.