DRAM Input Sampling Circuit With Pulse Widening and Invalid C/A Shielding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In Dynamic Random Access Memory (DRAM) systems, shared Command/Address (C/A) signals lead to invalid signal sampling, causing unnecessary energy consumption and potential sampling failures due to narrowing pulse widths and signal skewing, especially with increasing operating frequencies.
Innovation Solution
An input sampling method and circuit that acquires and widens the pulse width of the chip select signal, shields invalid C/A signals based on the widened signal, and samples the resulting to-be-sampled signal using a clock signal, preventing invalid signal sampling and maintaining sufficient pulse width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the C/A signals of multiple DRAMs share a data bus, then the device complexity is reduced, but invalid signals from other DRAMs cause sampling errors and increase energy consumption
Solution Approach 1:
A shielding signal is introduced as an intermediary between the shared C/A signal and the sampling circuit. This shielding signal, generated based on the chip select signal, selectively masks invalid C/A signals from other DRAMs before they reach the sampling circuit, thereby preventing sampling errors while maintaining the shared bus structure
Solution Approach 2:
The shielding signal is generated in advance based on the chip select signal before the C/A signal sampling occurs. By preliminarily preparing the shielding signal that indicates which C/A signals are valid, the system prevents invalid signals from being sampled, thus ensuring sampling accuracy without requiring additional validation after sampling
2Productivity
If the operating frequency of DRAM is increased, then the productivity is improved, but the pulse width of C/A signals narrows causing sampling failures
Solution Approach 1:
The shielding signal is generated in advance based on the chip select signal before the C/A signal sampling occurs. By preliminarily preparing the shielding signal that indicates which C/A signals are valid, the system ensures that even narrow high-frequency pulses are properly filtered and sampled without requiring the pulse width to be extended
Solution Approach 2:
The patent replaces traditional timing-based signal validation (which relies on pulse width and timing margins) with a logic-based shielding mechanism. Instead of mechanically ensuring sufficient pulse width through timing constraints, the system uses logical shielding signals to identify and preserve valid samples, enabling accurate sampling at higher frequencies where pulse widths are narrower
3Productivity
If the pulse width of C/A signals is narrowed to increase operating frequency, then the productivity is improved, but signal skewing increases causing sampling errors
Solution Approach 1:
The shielding signal acts as an intermediary that decouples the timing relationship between C/A signals from different DRAMs. By using the chip select signal to generate the shielding signal, the system creates a reference that is synchronized with the valid data periods, allowing valid samples to be identified regardless of timing skew caused by narrowed pulse widths
Solution Approach 2:
The patent replaces timing-based validation mechanisms (which are sensitive to signal skew when pulse widths are narrowed) with a logic-based shielding approach. The shielding signal provides a timing reference that is inherently synchronized with valid data periods, eliminating the need for precise timing margins and making the system robust against signal skew at high operating frequencies
Data Source
AI summary
An input sampling method includes the following: acquiring a first pulse signal and a second pulse signal respectively; widening a pulse width of the first pulse signal to obtain a widened first pulse signal; shielding an invalid signal in the second pulse signal based on the widened first pulse signal to obtain a to-be-sampled signal; and finally, sampling the to-be-sampled signal based on a clock signal. In this way, prior to signal sampling, the invalid signal is shielded to avoid additional power consumption caused by sampling the invalid signal, and at the same time, the pulse width of the signal is widened to avoid sampling failure.