DRAM Bit Line Pre-Charge Circuit With Stable Low-Noise Step-Down Bias
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Solution Overview
Problem
Existing pre-charge circuits in DRAM memory systems face issues with unstable output voltage and high ripple and switching noise, particularly in step-down circuits, which affect the reliability and efficiency of bit line pre-charging.
Innovation Solution
A charging circuit that includes a step-down circuit with adjustable bias voltages generated from bias voltage generation circuits, using threshold voltages higher or lower than typical bias voltages to stabilize the pre-charge voltage and reduce ripple and switching noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a step-down circuit is used to generate pre-charge voltage, then the output voltage can be stabilized, but ripple and switching noise increase
Solution Approach 1:
A capacitor is introduced as an intermediary energy storage element between the step-down circuit and the bit line. This capacitor smooths out the voltage fluctuations and filters the ripple and switching noise generated by the step-down circuit, while still allowing the step-down circuit to provide stable pre-charge voltage. The capacitor acts as a mediator that decouples the voltage stabilization function from the noise generation.
Solution Approach 2:
The patent adjusts the bias voltages applied to the step-down circuit to specific threshold values (higher or lower than typical bias voltages) to optimize the switching characteristics. By changing the bias voltage parameters, the circuit achieves a balance between voltage stability and reduced switching noise, controlling the trade-off between these two parameters.
2Device complexity
If typical bias voltages are used in the step-down circuit, then the circuit operates simply, but the pre-charge voltage becomes unstable
Solution Approach 1:
The patent modifies the bias voltage parameters of the step-down circuit by applying threshold voltages that are either higher or lower than typical bias voltages. This parameter change stabilizes the pre-charge voltage output while maintaining relatively simple circuit topology. The adjusted bias voltages ensure proper operation of the step-down circuit without requiring complex additional circuitry.
3Productivity
If higher switching speed is used for pre-charging, then productivity increases, but ripple and switching noise increase
Solution Approach 1:
The capacitor serves as a mediator that allows fast switching operations while filtering the resulting noise. It enables the step-down circuit to operate at high switching speeds for rapid pre-charging, while the capacitor smooths out the voltage transients and reduces switching noise that would otherwise propagate to the bit line and affect memory operations.
Solution Approach 2:
The patent converts the harmful switching noise and ripple generated by fast switching into a beneficial effect by using the capacitor to store and smooth this energy. The switching transients that would normally be harmful are instead utilized to charge the capacitor, which then provides clean, stable voltage during the pre-charge operation, effectively transforming the noise problem into an energy storage advantage.
Data Source
AI summary
A semiconductor device and a method of operating the semiconductor device are disclosed. In one aspect, the semiconductor device includes a memory cell connected to a bit line, and a biasing circuit configured to output a first bias voltage and a second bias voltage, the first bias voltage generated based on a threshold voltage of a p-type transistor, and the second bias voltage generated based on a threshold voltage of an n-type transistor. The semiconductor device includes a step-down circuit connected to the bit line and configured to receive the first and second bias voltages, the step-down circuit configured to output an output voltage to charge the bit line based on the first and second bias voltages.