DRAM Sub-Channel Refresh Scheduling for Bandwidth Efficiency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional DRAM architectures face performance degradation due to frequent and prolonged refresh operations, leading to traffic blocking and inefficiencies in bandwidth utilization, particularly in sub-channel configurations.

Innovation Solution

Implementing synchronization, adaptive spacing, and opportunistic issuance of refresh requests across sub-channels to optimize refresh performance, including concurrent issuance of refresh requests, dynamic scheduling based on bus efficiency, and selective issuance during read/write phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed more frequently to prevent charge leakage, then data reliability is improved, but bandwidth utilization deteriorates due to increased traffic blocking

Engineering Contradiction:
Improvedata reliabilityVSAvoidbandwidth utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the DRAM channel into multiple independent sub-channels (e.g., sub-channel 0 and sub-channel 1), each capable of handling refresh operations independently. This segmentation allows refresh traffic to be distributed across sub-channels rather than blocking the entire channel, thereby maintaining bandwidth utilization while ensuring data reliability through frequent refreshes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic scheduling of refresh operations that adapts to current bus efficiency and traffic conditions. The refresh scheduler dynamically determines when to issue refresh requests based on real-time bus utilization metrics, allowing the system to perform refresh operations during periods of lower traffic intensity and maintain optimal bandwidth utilization while ensuring adequate refresh frequency for data reliability.

Inventive Principle:
Principle #15Dynamics

2Reliability

If refresh requests are issued sequentially in sub-channel order, then refresh coverage is improved, but queue imbalance occurs leading to performance degradation

Engineering Contradiction:
Improverefresh coverageVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a periodic refresh pattern that alternates between sub-channels in a round-robin fashion rather than sequentially servicing one sub-channel completely before moving to the next. This periodic interleaving of refresh requests across sub-channels ensures all sub-channels receive timely refresh coverage while preventing any single scheduling queue from becoming overloaded, thereby maintaining both refresh coverage and performance.

Inventive Principle:
Principle #19Periodic action

3Reliability

If refresh operations block all traffic to refreshed portions, then refresh effectiveness is improved, but overall system throughput deteriorates

Engineering Contradiction:
Improverefresh effectivenessVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the memory channel into multiple independent sub-channels, each with its own scheduling queue and refresh operations. When a refresh operation is performed on one sub-channel, only that specific sub-channel experiences traffic blocking, while other sub-channels continue to process traffic normally. This segmentation isolates the impact of refresh blocking, maintaining refresh effectiveness for the targeted sub-channel while preserving system throughput through parallel operation of other sub-channels.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12586627B2Refresh performance optimizations for DRAM technologies with sub-channel and/or pseudo-channel configurations
Publication Date: 2026.03.24 INTEL CORP
  • US12586627B2 patent drawing
  • US12586627B2 patent drawing
  • US12586627B2 patent drawing

AI summary

Systems, apparatuses and methods may provide for technology that generates a first refresh request with respect to a first sub-channel in a dynamic random access memory (DRAM), generates a second refresh request with respect to a second sub-channel in the DRAM, wherein the first sub-channel and the second sub-channel share a channel boundary, and synchronizes the first refresh request with the second refresh request. In one example, the first sub-channel is associated with a first scheduling queue and the second sub-channel is associated with a second scheduling queue. The technology may also adaptively spread refresh commands over the refresh interval period, dynamically schedule refreshes based on bus efficiency and/or selectively issue opportunistic refreshes based on read/write traffic.