DRAM Row-Level Refresh Using PRAC Cells to Cut Standby Power
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices, particularly DRAMs, face challenges in achieving low power consumption due to the need for periodic refresh operations to retain data, which can lead to unnecessary power consumption during standby times.
Innovation Solution
A memory device and operating method that selectively performs refresh operations based on whether a word line is activated, using PRAC cells to store activation information and determine which word lines require refresh, thereby reducing unnecessary refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic refresh operations are performed to retain data in DRAM, then data retention reliability is improved, but power consumption increases
Solution Approach 1:
The patent segments the refresh operation from a global array-wide operation to a row-level operation. By dividing the memory array into multiple rows and applying refresh only to active rows rather than the entire array, the solution maintains data retention reliability for accessed data while significantly reducing overall power consumption during standby periods.
Solution Approach 2:
The patent implements dynamic refresh control by monitoring row activation status and adjusting refresh operations accordingly. The system transitions from static periodic refresh to dynamic on-demand refresh, where refresh operations are performed only when rows are actually activated, optimizing the balance between data retention and power consumption.
2Reliability
If full array self-refresh operation is performed, then data retention is ensured, but unnecessary power consumption occurs during standby
Solution Approach 1:
The patent applies partial self-refresh operation instead of full array refresh. By performing refresh operations only on rows that have been activated during current or previous operations, the system avoids the excessive action of refreshing the entire array, thereby eliminating unnecessary power consumption while maintaining adequate data retention for actively used data.
Solution Approach 2:
The system uses its own operational history (activation status of rows) to determine which rows need refreshing. The self-service mechanism relies on the memory device's internal state information to automatically identify and refresh only the necessary rows, eliminating the need for external control signals for each refresh operation.
3Adaptability or versatility
If row activation information is stored in PRAC cells, then selective refresh capability is improved, but device complexity increases
Solution Approach 1:
The patent makes PRAC cells serve multiple functions: they store row activation information for selective refresh control, and can also function as regular memory storage cells when not being used for activation tracking. This multi-functionality approach allows the system to gain selective refresh capability without proportionally increasing device complexity, as the same physical structure serves dual purposes.
Data Source
AI summary
A memory device includes a memory cell array including normal cells and per row activation count (PRAC) cells coupled with a plurality of word lines corresponding to a plurality of rows, a refresh control circuit configured to refresh the plurality of word lines corresponding to the plurality of rows based on a refresh command, and an activation generating circuit configured to generate a row activation signal based on an activation command. The row activation signal is configured to activate the plurality of word lines corresponding to a row address of the plurality of rows. Each of the PRAC cells is configured to store row activation information. Each of the normal cells is configured to store data.