DRAM Spare Row Mapping for Faulty Row Repair
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Solution Overview
Problem
Current DRAM repairing techniques are limited by a lack of sufficient spare rows, leading to permanent errors and the need for manual replacement of faulty DRAMs/DIMMs, as existing methods like On-die ECC and PPR are insufficient for end-to-end error correction and spare row management.
Innovation Solution
The method involves reserving additional memory space within the DRAM for spare rows, identifying faulty rows using memory testing, classifying them as correctable or uncorrectable, and mapping correctable rows to available spare rows, updating error information tables, and copying data to spare rows, with the ability to dynamically increase spare rows using BIOS boot menus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PPR techniques are used with limited spare rows, then manufacturing complexity is reduced, but reliability decreases due to insufficient error correction capability
Solution Approach 1:
The patent implements dynamic spare row management where the system automatically identifies faulty rows through testing, classifies them as correctable or uncorrectable, and dynamically maps correctable rows to spare rows. This dynamic approach allows the system to adapt to different error scenarios and maximize the utilization of limited spare rows, thereby improving reliability without requiring a fixed large number of spare rows.
Solution Approach 2:
The system performs self-diagnosis and self-repair by automatically testing memory rows, identifying faults, and mapping faulty rows to spare rows without external intervention. The error information table is automatically updated with fault locations and correction status, enabling the system to manage its own reliability without increasing operational complexity for users.
2Reliability
If more spare rows are allocated for PPR, then reliability improves, but manufacturing complexity and cost increase
Solution Approach 1:
The patent changes the parameter of spare row allocation from a fixed static value to a dynamic value that adjusts based on actual fault conditions. The system monitors error rates and fault patterns, then optimizes the mapping of faulty rows to spare rows. This parameter change allows effective error correction with fewer spare rows compared to traditional static allocation methods.
Solution Approach 2:
The system performs preliminary testing and classification of memory rows during manufacturing or initialization, identifying potential faulty rows before they cause system failures. By pre-mapping correctable faulty rows to spare rows and storing this information in the error information table, the system prepares correction strategies in advance, reducing the need for excessive spare rows and simplifying manufacturing planning.
3Reliability
If manual replacement of faulty DRAMs is performed, then reliability is restored, but loss of time and productivity decrease
Solution Approach 1:
The system automatically detects faulty rows through continuous testing, classifies them as correctable or uncorrectable, and performs self-repair by mapping correctable rows to spare rows. This self-service capability eliminates the need for manual intervention and system downtime, as the repair process occurs automatically during operation or initialization, thereby maintaining system availability and preventing productivity loss.
Solution Approach 2:
The system performs preliminary identification and mapping of faulty rows to spare rows during initialization or low-activity periods, so that when actual failures occur, the repair is already prepared and can be executed instantly. This preliminary action ensures that reliability is restored without significant downtime, as the system does not need to halt operations for manual replacement or complex diagnostic procedures.
Data Source
AI summary
Various example embodiments are directed to a method, device, and system for repairing a Dynamic Random Access Memory (DRAM) memory device. The method includes reserving a memory space within the DRAM memory device, the reserved memory space including a plurality of spare rows, identifying one or more faulty rows within the DRAM memory device using at least one memory testing method, updating an error information table based on information of a respective classified correctable faulty row, in response to an error count for the respective classified correctable faulty row exceeding a desired threshold value, mapping the respective classified correctable faulty row to an available spare row of the plurality of spare rows, storing the mapping of the respective correctable faulty row and the mapped spare row in a row repair translation table, and copying data stored in the respective correctable faulty row into the mapped spare row.