DRAM Refresh Control via Flash Memory Temperature Feedback

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Solution Overview

Problem

In semiconductor devices with multiple chips, the refresh period of DRAM chips is unnecessarily changed in response to access requests from flash memory chips, leading to increased current consumption and potential malfunctions, even when the flash memory chip's temperature does not rise.

Innovation Solution

Incorporating a temperature sensor in each DRAM chip to output temperature signals, allowing the refresh period to be adjusted based on actual temperature changes, thereby preventing unnecessary changes and reducing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the refresh period of the DRAM chip is changed in response to an access request made to the flash memory chip, then the DRAM chip can prevent malfunction due to temperature rise, but the refresh period is unnecessarily changed even when the temperature does not rise, increasing current consumption

Engineering Contradiction:
ImproveDRAM chip reliabilityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements a feedback mechanism where the refresh period of the DRAM chip is dynamically adjusted based on actual temperature information from the flash memory chip. The control unit receives temperature data and only modifies the refresh period when the temperature exceeds a predetermined threshold, creating a closed-loop control system that responds to actual conditions rather than operating assumptions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the refresh period parameter of the DRAM chip based on temperature conditions. When the flash memory chip temperature exceeds the threshold, the refresh period is extended; when the temperature is within the normal range, the refresh period remains at its default value. This conditional parameter adjustment optimizes both reliability and energy consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the refresh period is shortened to prevent DRAM malfunction, then data retention reliability improves, but current consumption increases due to more frequent refresh operations

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent makes the refresh period dynamic rather than static. The control unit adjusts the refresh period in real-time based on temperature feedback from the flash memory chip. When temperature is low, the refresh period is longer (reducing refresh frequency and current consumption); when temperature is high, the refresh period is shorter (maintaining data retention reliability). This dynamic adjustment resolves the contradiction between reliability and energy consumption.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution accurately detects temperature changes and adjusts the refresh period, preventing malfunctions and reducing current consumption by ensuring the refresh period is only changed when necessary, thus optimizing energy use in semiconductor devices.

Implementation Method 1

a first temperature sensor outputting a first temperature signal

Methodology Applied
Scientific EffectTemperature sensing:

Data Source

PatentUS9368188B2Semiconductor device performing refresh operation
Publication Date: 2016.06.14 LONGITUDE LICENSING LTD
  • US9368188B2 patent drawing
  • US9368188B2 patent drawing
  • US9368188B2 patent drawing

AI summary

Disclosed herein is a device that includes a first semiconductor chip. The first semiconductor chip includes a first data storage area storing data, a first refresh circuit repeating a first refresh operation on the first data storage area to make the first data storage area retain the data, a first terminal supplied with a first control signal from outside of the first semiconductor chip, and a first control circuit coupled between the first terminal and the first refresh circuit to control a repetition cycle of the first refresh operation in response to the first control signal.