DRAM Sense Amplifier Boosting Circuit Low Power Sensing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional DRAMs experience reduced sensing accuracy and increased sensing duration due to low power supply voltage, which affects the precharge operation and data retention.

Innovation Solution

A semiconductor device with a sense amplifier and boosting circuits that selectively supply or block power supply voltage and ground voltage to nodes, using control signals to boost voltages during precharge operations when the power supply voltage is low, thereby enhancing the voltage difference between bit lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional DRAM operates at low power supply voltage, then power consumption is reduced, but sensing accuracy deteriorates and sensing duration increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsensing accuracy
Core Design Contradiction:
Loss of energyVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing a precharge operation before the actual sensing operation. During precharge, the bit lines are precharged to a predetermined voltage level, and the sense amplifier nodes are prepared in advance. This preliminary preparation ensures that when sensing occurs at low power supply voltage, the voltage difference on bit lines can be effectively amplified despite the reduced supply voltage, thereby maintaining sensing accuracy while operating at lower power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes operating parameters by dynamically adjusting the precharge voltage level based on the power supply voltage condition. When power supply voltage is low, the precharge voltage is set to a specific level that compensates for the reduced supply, ensuring sufficient voltage swing for accurate sensing. This parameter adjustment allows the system to maintain sensing performance across different power supply conditions while consuming less power.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If conventional DRAM operates at low power supply voltage, then power consumption is reduced, but sensing duration increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsensing duration
Core Design Contradiction:
Loss of energyVSDuration of action of moving object

Solution Approach 1:

By performing precharge operations in advance, the bit lines and sense amplifier nodes are prepared before sensing begins. This preliminary action reduces the time required during the actual sensing phase, as the system starts from a known initial state rather than requiring longer charging times from scratch, thus reducing overall sensing duration while maintaining low power operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs periodic precharge operations that are timed to occur before sensing operations. This periodic preparation ensures that the system is always in an optimal state for rapid sensing, creating a rhythm of prepare-and-execute cycles that minimizes active sensing duration while maintaining low power consumption during idle periods.

Inventive Principle:
Principle #19Periodic action

3Loss of energy

If power supply voltage is low, then power consumption is reduced, but voltage difference between bit lines during precharge is insufficient for accurate sensing

Engineering Contradiction:
Improvepower consumptionVSAvoidsensing accuracy
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent introduces the precharge operation as an intermediary process between power supply and sensing. During precharge, the bit lines are charged to a predetermined voltage level that serves as an intermediate state, preparing the system for accurate sensing. This intermediary step compensates for low power supply voltage by ensuring sufficient voltage swing is available during sensing, thereby maintaining reliability without increasing power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the voltage parameter dynamically by adjusting the precharge voltage level according to the power supply voltage condition. When power supply voltage is low, the precharge voltage is set to an optimized level that ensures sufficient voltage difference for accurate sensing. This parameter adaptation allows the system to maintain reliable sensing operation across varying power supply conditions while consuming minimal power.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution stabilizes and accelerates data reading from memory cells by increasing the voltage difference between bit lines during precharge operations, even at low power supply voltages, ensuring accurate sensing and efficient data retention.

Implementation Method 1

boosting a voltage of the first node by using a first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8842483B2Semiconductor device and method of operating the same
Publication Date: 2014.09.23 SAMSUNG ELECTRONICS CO LTD
  • US8842483B2 patent drawing
  • US8842483B2 patent drawing
  • US8842483B2 patent drawing

AI summary

A semiconductor device and a method of operating the same, the semiconductor device including a sense amplifier connected between a bit line and a complementary bit line; a first power supply circuit configured to select between supplying a power supply voltage to the first node and blocking the power supply voltage from the first node in response to a first control signal; a second power supply circuit configured to select between supplying a ground voltage to the second node and blocking the ground voltage from the second node in response to a second control signal; and a first boosting circuit configured to boost a voltage at the first node in response to a third control signal.